The Roadmap To 5nm


By Debra Vogler Among the challenges the semiconductor industry will be facing as it moves down the path to node 5 are resistance-capacitance (RC) management and integration. SEMI is pleased to announce a SEMICON West 2015 STS technical program exploring these and other high-volume manufacturing challenges. According to An Steegen, SVP of Process Technology at imec, the list of RC managemen... » read more

The End Of Silicon?


As transistors shrink, not all device parameters scale at the same rate—and therein lies a potentially huge problem. In recent years, manufacturers have been able to reduce equivalent oxide thickness (EOT) more quickly than operating voltage. As a result, the electric field present in the channel and gate dielectric has been increasing. Moreover, EOT reduction is achieved in part by reduci... » read more

DSA Defects Continue Downward Trend


As previously discussed, the majority of defects in early directed self-assembly (DSA) processes were due to particles and other contaminants, and could be attributed to the immaturity of the process and materials. As manufacturers consider whether to incorporate DSA into specific technology nodes, they need to assure themselves that production-worthy yields can be achieved. Recent research at ... » read more

The Week In Review: Manufacturing


Intel is in talks to buy Altera, according to The Wall Street Journal. If a deal is reached, Intel would enter the FPGA market amid a slowdown in its core processors business. Intel would also secure its largest foundry customer in Altera. For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above wor... » read more

Manufacturing Bits: March 3


Nanoimprint consortium CEA-Leti has launched a nanoimprint lithography program in an effort to propel the technology in the marketplace. The imprint program, dubbed Inspire, will focus on various and emerging non-semiconductor applications, according to Laurent Pain, patterning program manager and business development manager within the Silicon Technologies division at the French R&D or... » read more

Tighter CD Requires Tighter Laser Bandwidth


Concerns that the bandwidth of the light source for optical lithography can affect pattern quality are not new. No lens material is completely free from chromatic aberration: the refractive index varies with wavelength, and so different wavelengths will focus at different points. Chromatic aberration became a much less serious concern with the replacement of broadband mercury lamps with lase... » read more

Manufacturing Bits: Feb. 24


EUV progress report At the SPIE Advanced Lithography conference in San Jose, Calif., ASML Holding said that one customer, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), has exposed more than 1,000 wafers on an NXE:3300B EUV system in a single day. This is one step towards the insertion of EUV lithography in volume production. During a recent test run on the system, TSMC exposed 1,022 w... » read more

The Week In Review: Manufacturing


For years, chipmakers have attempted to build fabs in India. So far, however, India has failed to set up modern fabs and for good reason. There are issues in terms of obtaining dependable power and water for a fab in India, according to Will Strauss, president of Forward Concepts, who added that India also suffers from government bureaucracy. India is still trying. Last week, Cricket Semicon... » read more

System Bits: Feb. 17


Can you hear light? Silicon photonics has gained increasing attention as a key driver of lab-on-a-chip biosensors and of faster-than-electronics communication between computer chips. The technology builds on tiny structures known as silicon photonic wires. The wires work because light moves slower in the silicon core than in surrounding air and glass. Thus, the light is trapped inside the wire... » read more

Next Channel Materials?


Chipmakers are making a giant leap from planar transistors to [getkc id="185" kc_name="finFETs"]. Initially, [getentity id="22846" e_name="Intel"] moved into finFET production at 22nm and is now ramping up its second-generation finFETs at 14nm. And the other foundries will enter the finFET fray at 16nm/14nm. So what’s next? Chipmakers will likely extend the finFET architecture to both 10nm... » read more

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