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A Promising Future For Interconnect IP


Complexity of SoC designs continues to increase primarily due to increased demand for functionality and performance in all electronic devices. Studies that Semico Research has conducted on the SoC design landscape shows the number of discrete SIP blocks has continued to rise in response to increased market requirements from new applications and richer feature sets. Table 1: Comparison of 1st... » read more

The Week In Review: Design


M&A Synopsys acquired Sidense, a provider of antifuse one-time programmable (OTP) non-volatile memory (NVM) for standard-logic CMOS processes. Sidense was founded in 2004 in Canada. Terms of the deal were not disclosed. ArterisIP acquired the software and intellectual property rights of iNoCs, a provider of network-on-chip IP and design tools. Founded in 2007, the Swiss company was spun... » read more

Reducing Latency In ADAS SoC Design Enhances QoS For Digital Mirroring


The state-of-the-art of Advanced Driver Assistance Systems (ADAS) is quickly changing, and ADAS chip engineers are finding that on-chip quality-of-service (QoS) is becoming a system-level constraint on ADAS performance. Designers need innovative approaches to address these issues, which is why Dream Chip Technologies highlighted one such method in a recent presentation. Dream Chip Technologi... » read more

The Perfect (Silicon) Marriage… Yes, It Exists


Nope, this is not Dr. Phil masquerading as a tech blogger, trying to penetrate the semiconductor market. I am no Dr. Phil, but today, rather than expound on interconnect IP and how it relates to the various trends, applications, markets, etc., I would like to tell you a story about a relationship and share an experience with one of our customers, a leading manufacturer of autonomous systems. ... » read more