tag: lithography

Challenges Mount For Patterning And Masks
By Mark LaPedus - 19 Mar, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss lithography and photomask trends with Uday Mitra, vice president and chief technology officer for the Etch Business Unit at [getentity id="22817" e_name="Applied Materials"]; Pawitter Mangat, senior manager and deputy director for EUV lithography at [getentity id="22819" comment="GlobalFoundries"]; Aki Fujimura, chief executive at [getentity id="228... » read more

Extra! Extra! Read All About It!
By Marc David Levenson - 26 Feb, 2015 - Comments: 1

ASML announced that they are going into the pellicle business at 2:15pm on February 25 at the SPIE Advanced Lithography Symposium in San Jose. These are not your garden variety plastic membrane pellicles, mind you, but rather EUV pellicles made out of 50nm thick polysilicon film and stretched on frames that can be attached, removed and reattached on EUV masks. Dr. Carmen Zoldesi of ASML reveal... » read more

Will 10nm Be The Last Big Node?
By Ed Sperling - 19 Feb, 2015 - Comments: 0

There is a great deal of attention being paid to established nodes these days and everything up to and including 10nm. What comes after that remains a mystery. Intel and a handful of others will keep pushing to the next nodes, of course. Still, where the commercial foundries—including Intel—place their next big bets is a matter of ongoing debate. There is no doubt that 7nm and 5nm will b... » read more

First Look: 10nm
By Ed Sperling - 29 Jan, 2015 - Comments: 6

As the semiconductor industry begins grappling with mass production at 14/16nm process nodes, work is already underway at 10nm. Tools are qualified, IP is characterized, and the first test chips are being produced. It's still too early for production, of course—perhaps three years too early—but there is enough information being collected to draw at least some impressions about just how toug... » read more

Tech Talk: Photomask Challenges
By Mark LaPedus - 22 Jan, 2015 - Comments: 0

GlobalFoundries' Bob Pack talks with Semiconductor Engineering about new problems experienced by photomask shops and how does lithography affects it all. [youtube vid=8hJwVhaZhFc] » read more

Tech Talk: Inverse Lithography
By Ed Sperling - 11 Dec, 2014 - Comments: 0

D2S’ Leo Pang talks with Semiconductor Engineering about lithography, inverse lithography, photomasks, where the problems are, and what needs to be done to move forward. [youtube vid=mn8JWaP8Z68] » read more

What’s The Other Guy Doing?
By Ed Sperling - 11 Dec, 2014 - Comments: 0

Competition is generally a good thing. It improves service, promotes innovation, forces efficiencies and price cuts where necessary, and it ratchets up the pressure to bring products and services to market faster. Those who can't keep up usually lose market share, and eventually the business sector consolidates until something comes along to disrupt it. That cycle has been repeated in every ... » read more

Manufacturing Bits: Dec. 2
By Mark LaPedus - 02 Dec, 2014 - Comments: 0

Storage ring EUV source Needless to say, extreme ultraviolet (EUV) lithography is delayed. Chipmakers hope to insert EUV at the 7nm node, but that’s not a given. As before, the big problem is the EUV light source. So far, the source can’t generate enough power to enable the required throughput for EUV in mass production. Researchers at the SLAC National Accelerator Laboratory have one p... » read more

Design Rules Explode At New Nodes
By Ed Sperling - 17 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down changing design rules with Sergey Shumarayev, senior director of custom IP design at Altera; Luigi Capodieci, R&D fellow at [getentity id="22819" comment="GlobalFoundries"]; Michael White, director of product marketing for Calibre Physical Verification at [getentity id="22017" e_name="Mentor Graphics"], and Coby Zelnik, CEO of [getentity id="22478" e_name=... » read more

Photoresist Problems Ahead
By Ann Mutschler - 14 Nov, 2014 - Comments: 2

As the semiconductor industry begins its ramp to manufacturing at 10nm and below, activity is heating up involving lithography modeling. The goal is to be ready when all the pieces of the puzzle are in place. That includes [gettech id="31045" comment="EUV"], when it finally becomes commercially viable, as well as extending ArF [getkc id="80" comment="lithography"]. When it comes to lithogra... » read more

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