Experts At The Table: MEMS Challenges


Semiconductor Engineering sat down to discuss the challenges of MEMS with Rakesh Kumar, senior director of the MEMS program at GlobalFoundries; Tak Tanaka, managing director for Applied Global Services at Applied Materials; Paul Lindner, executive technology director at EV Group; and Alissa M. Fitzgerald, founder and managing member at A.M. Fitzgerald & Associates. What follows are excerpts... » read more

New Pain And Inflection Points


Jack Harding, CEO of eSilicon, talks with Semiconductor Engineering about the explosion in the costs and the risk of semiconductor designs at the leading edge of Moore's Law. [youtube vid=HLS5QhnGHfM] » read more

GloFo Says 28nm FD-SOI Die Cost Much Less Than 28nm Bulk HPP


Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ According to Shigeru Shimauchi, Country Manager, GlobalFoundries Japan, for the same level of performance, the die cost for 28nm FD-SOI will be substantially less than for 28nm bulk HPP (“high performance-plus”). Specifically, to get a 30%  increase in performance over 28nm bulk LPS PolySiON, HPP increases die ... » read more

Foundry Talk


GlobalFoundries CEO Ajit Manocha sounds off on Foundry 2.0, 450mm wafers, lithography challenges, stacked die, the Internet of Things and the rush to the next process node. [youtube vid=WfjtlZkCi0w] » read more

Let’s All Meet At The Via Bar!


By Jean-Marie Brunet At 28 nm and below, a variety of new design requirements are forcing us to adjust the traditional layout and verification process of digital designs. The use of vias, in particular, has been significantly impacted. New via types have been introduced, and the addition of double patterning, FinFETS, and other new design techniques has not only generated a considerable increa... » read more

Extending Copper Interconnect Beyond The 14nm Node


Fabricating interconnects is one of the most process-intensive and cost-sensitive parts of manufacturing. To find out more about what's changing in this area and why it's so important, click here. » read more

Bigger Wafers, Bigger Risk


At 22/20/16/14nm the semiconductor industry is experiencing a rather new twist on Moore’s Law. Smaller, as in smaller feature sizes, is no longer assumed to be cheaper—or at least not for everyone. In fact, the cost per transistor for the first time in more than half a century could rise in some cases. Whether this outlook improves as the semiconductor industry gains more experience wit... » read more

FinFET Isolation: Bulk vs. SOI


Terry Hook of IBM recently contributed an article to ASN about FinFET isolation issues on bulk vs. SOI.  It generated immense interest, and created lots of discussion on various LinkedIn groups.  In case you missed it, here it is again. (This article is based on an in-depth presentation Terry gave at the SOI Consortium's Fully-Depleted Tech Workshop, held during VLSI-TSA in Taiwan, April 2... » read more

Upbeat Prediction


By Clark Tseng The semiconductor industry started out quite strong in 2012 but declined rapidly in the second half of the year, resulting in a slight year-over-year decline of 2.7% in worldwide semiconductor sales. On the other hand, worldwide capital equipment market recorded a decline of 15% from $43.5 billion in 2011 to $36.9 billion in 2012 according to the SEMI WWSEMS report. While indust... » read more

GF’S Two Flavors Of FD-SOI


Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ Hearing the news that GlobalFoundries would be offering two flavors of FD-SOI, ASN asked the company to explain the strategy further. Here are the responses provided by Subi Kengeri, Vice President of Advanced Technology Architecture.   [caption id="" align="alignleft" width="110"] Subi Kengeri, VP Advanced T... » read more

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