Atomic Layer Etch Finally Emerges


The migration towards finFETs and other devices at the 20nm node and beyond will require a new array of chip-manufacturing technologies. Multiple patterning, hybrid metrology and newfangled interconnect schemes are just a few of the technologies required for future scaling. In addition, the industry also will require new techniques that can process structures at the atomic level. For example... » read more

The Sensor Revolution


“Sensors will transform manufacturing from now on,” said Eric Janson, senior vice president of sales and marketing at AMS (Austria Micro Systeme), an analog mixed-signal semiconductor manufacturer based in Austria. There have been many such predictions in the past—lithography, processors, memory and various materials all have been predicted to change semiconductor manufacturing. But se... » read more

Stopping Mask Hotspots Before They Escape The Mask Shop


By Aki Fujimura The same types of physics-based issues that have haunted lithography for decades have started to impact mask writing as well. The increasingly small and complex mask shapes specified by optical proximity correction (OPC) that are now required for faithful wafer lithography at 28nm-and-below nodes have given rise to an increase in mask hotspots. Mask hotspots occur when the shap... » read more

Gaps In Metrology Could Impact Yield


For some time, chipmakers have been developing new and complex chip architectures, such as 3D NAND, finFETs and stacked die. But manufacturing these types of chips is no simple task. It requires a robust fab flow to enable new IC designs with good yields. In fact, yield is becoming a more critical part of the flow. Yield is a broad term that means different things to different parts of the ... » read more

Time To Revisit 2.5D And 3D


Chipmakers are reaching various and challenging inflection points. In logic, many IC makers face a daunting transition from planar transistors at 20nm to finFETs at 14nm. And on another front, the industry is nearing the memory bandwidth wall. So perhaps it’s time to look at new alternatives. In fact, chipmakers are taking a hard look, or re-examining, one alternative—stacked 2.5D/3D chi... » read more

Effectively Manage Material Obsolescence To Avoid Costly Surprises


This paper describes the solution that allows complete management and control for companies to optimize their business and their performance on commitment to customers, specifically with respect to effective management of material obsolescence. To view this paper, click here. » read more

Tech Talk: Multipatterning, Take Two


Mentor Graphics' David Abercrombie continues with his whiteboard talk about coloring with advanced lithography, including what goes wrong and how to fix it. [youtube vid=HCBtvHCcbf4] » read more

Impact Of Illumination On Model-Based SRAF Placement For Contact Patterning


Sub-Resolution Assist Features (SRAFs) have been used extensively to improve the process latitude for isolated and semi-isolated features in conjunction with off-axis illumination. These SRAFs have typically been inserted based upon rules which assign a global SRAF size and proximity to target shapes. Additional rules govern the relationship of assist features to one another, and for random log... » read more

What’s The Backup Plan?


Over the past dozen years we have witnessed two major breakdowns in the global semiconductor supply chain. The first occurred in 2002, when an outbreak of severe acute respiratory syndrome (SARS) basically closed off Chinese manufacturing for several months. The second major problem occurred in 2011, when the Tohoku earthquake and a devastating tsunami shut down a good portion of Japanese produ... » read more

The Next Big Threat: Manufacturing


The business adage that you’re only as good as your partners should be a core principle of doing business when it comes to security. But with a complex SoC you don’t always know all your partners, who financed them—or worse, who else they’re working with or working for. Consider this scenario: A band of sophisticated thieves grinds off the top of an SoC package, inserts probes to map... » read more

← Older posts Newer posts →