The Week In Review: Design


Tools Mentor Graphics unveiled a new version of its PCB design platform, even going so far as to rename it slightly (Expedition to Xpedition). Mentor claims it’s the most significant product in that space in years, bridging the environments between designers and engineers. Included are placement planning in densely packed boards, which simplifies re-use and improves time to market, and elect... » read more

Directed Self-Assembly Gains Momentum


At last year’s SPIE Advanced Lithography symposium, directed self-assembly (DSA) grabbed the spotlight as chipmakers provided the first glimpse of their initial work and results with the technology. The results were stunning, thereby propelling DSA from a curiosity item to a possible patterning solution for next-generation devices. Last year, in fact, GlobalFoundries, IBM, Intel and Sams... » read more

Enabling Test Portability With Graphs


Is it time to move up again? When it comes to test portability between simulation, emulation, prototypes and silicon, as well as an easier way to create a test structure, the answer appears to be a resounding ‘Yes.’ Looking at these activities from a higher level of abstraction and using a graph-based approach should allow automation where there has been none previously, and could allow val... » read more

When Order Matters


Do you brush your teeth before dinner? Put on your shoes before going to bed? Iron your clothes before you wash them? Okay, forget that last one. No one irons clothes anymore…do they? Anyway, my point is, if you want to achieve the best results from a process, order can be really important. And so it is with double patterning (DP) error debugging. As I’ve discussed, there are many types ... » read more

Deployment of OASIS In The Semiconductor Industry


The OASIS working group was first initiated in 2001, published the new format in March 2004, which was ratified as an official SEMI standard in September 2005. A follow-on initiative expanded the new standard to cover the needs of the mask manufacturing equipment sector with a derived standard called OASIS.MASK (P44) that was released in November 2005 and updated in May 2008. While there are ma... » read more

Blog Review: March 19


ARM’s Diya Soubra has discovered an interesting term in relation to the Internet of Things: Compound Applications. Will that make the IoT more compelling? Mentor’s Colin Walls points to some less obvious reasons for choosing a processor. No. 4 on his list is particularly noteworthy. Synopsys’ Mick Posner has some thoughts about wearable computing prototypes. Check out the top pho... » read more

Big Shift In SoC Verification


Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

IoT Creates New IP Requirements


With the rise of smart cities, cars and houses, an enhanced connectivity infrastructure bolstered by an increasingly connected culture, the Internet of Things (IoT) represents an exciting opportunity for semiconductor industry players. As such, market researchers at IDC expect the installed base of the Internet of Things will be approximately 212 billion "things" globally by the end of 2020 ... » read more

Power Grid Simulation


Introduction The underlying solver algorithms used in power grid (PG) simulation today are derivations of circuit simulation algorithms first developed many decades ago. In fact, the 40th anniversary of SPICE (a widely used circuit simulator), was celebrated in 2011. As such, it is understandable that many engineers have a jaundiced view towards claims of improved PG simulation performance. Ne... » read more

Pointing Fingers In Verification


With most EDA tools, the buying decision is related to improved quality of results or increased productivity. Will a new synthesis or clock optimization tool enable designers to do more, faster and are those gains worth the price? The equation is fairly simple. When it comes to verification tools, things are more complex. You can still make productivity gains, or purchase an additional tool ... » read more

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