tag: Mentor

Blog Review: Jan. 5
By Jesse Allen - 05 Jan, 2022 - Comments: 0

Cadence's Paul McLellan listens in on the challenges Tesla sees in manufacturing batteries for electric vehicles at scale and the types of battery chemistries it are currently using. Synopsys' Mark Kahan finds out the launch steps involved with the James Webb Space Telescope and the role of optical design software in creating the new instruments for Near IR and Mid IR sensing. Siemens' An... » read more

Domain-Specific Design Drives EDA Changes
By Ann Mutschler - 03 Jan, 2022 - Comments: 0

The chip design ecosystem is beginning to pivot toward domain-specific architectures, setting off a scramble among tools vendors to simplify and optimize existing tools and methodologies. The move reflects a sharp slowdown in Moore's Law scaling as the best approach for improving performance and reducing power. In its place, chipmakers — which now includes systems companies — are pushing... » read more

Batteries Take Center Stage
By Heidi Elliott - 27 Dec, 2021 - Comments: 0

For any mobile electronic device, the biggest limiting factors are the size, age, type, and utilization of the batteries. Battery technology is improving on multiple fronts. The batteries themselves are becoming more efficient. They are storing more energy per unit of area, and work is underway to provide faster charging and to increase the percentage of that energy that can be used, as well... » read more

Reliability Concerns Shift Left Into Chip Design
By Ann Mutschler - 22 Dec, 2021 - Comments: 1

Demand for lower defect rates and higher yields is increasing, in part because chips are now being used for safety- and mission-critical applications, and in part because it's a way of offsetting rising design and manufacturing costs. What's changed is the new emphasis on solving these problems in the initial design. In the past, defectivity and yield were considered problems for the fab. Re... » read more

Challenges With Stacking Memory On Logic
By Ed Sperling - 22 Dec, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss the changes in design tools and methodologies needed for 3D-ICs, with Sooyong Kim, director and product specialist for 3D-IC at Ansys; Kenneth Larsen, product marketing director at Synopsys; Tony Mastroianni, advanced packaging solutions director at Siemens EDA; and Vinay Patwardhan, product management group director at Cadence... » read more

EDA In The Cloud Is Driving Semiconductor Innovation
By Nebabie Kebebew - 22 Dec, 2021 - Comments: 0

In the past decade, the move towards cloud computing occurred primarily in sectors like finance, retail, and healthcare, with the emergence of leading public cloud vendors such as Amazon Web Services (AWS), Microsoft Azure, Google Cloud Platform, and others accelerating the trend. However, the chip design industry has been slower to adopt cloud computing. In the current highly competitive en... » read more

Taking 2.5D/3DIC Physical Verification To The Next Level
By Siemens EDA - 21 Dec, 2021 - Comments: 0

As package designs evolve, so do verification requirements and challenges. Designers working on multi-die, multi-chiplet stacked configurations in 2.5/3D IC designs can use Calibre 3DSTACK physical verification checks to verify die alignments for proper connectivity and electrical behavior. The Calibre 3DSTACK precheck mode enables design teams to find and correct basic implementation mistakes ... » read more

Blog Review: Dec. 21
By Jesse Allen - 21 Dec, 2021 - Comments: 0

Cadence's Paul McLellan points to Log4J, a logging utility with a new major vulnerability that could affect hundreds of millions of devices, what's being done to address it, and why the underlying problems may be around for decades. Siemens EDA's Ray Salemi continues explaining how to use Python for verification by checking out the Python logging module for pyuvm and how it compares to UVM r... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Dec, 2021 - Comments: 0

Memory CEA-Leti demonstrated 16-kbit ferroelectric random-access memory (FeRAM) arrays at the 130nm node. It utilizes back-end-of-line (BEOL) integration of TiN/HfO2:Si/TiN ferroelectric capacitors as small as 0.16 µm² and solder reflow compatibility for the first time for this type of memory. The researchers anticipate it will be useful for embedded applications such at IoT and wearable dev... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 17 Dec, 2021 - Comments: 0

Automotive Features of Toyota’s key fobs for entering vehicles get turned off when drivers do not start paying a subscription fee when the complementary subscriptions end, says an article in Ars Technica. SiLC Technologies announced its compact Eyeonic Vision Sensor, a FMCW lidar sensor, is now commercially available. The sensor has a silicon photonic chip that keeps a lidar’s size down... » read more

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