tag: Mentor

Blog Review: April 21
By Jesse Allen - 21 Apr, 2021 - Comments: 0

Synopsys' Taylor Armerding warns that without making cybersecurity a priority, companies may be positioning themselves as the weak link in the supply chain, and provides some tips for protecting both the company and its customers. Siemens EDA's Simon Favre points to critical area analysis and design for manufacturing as two important strategies to improve IC yield and quality. Cadence's P... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Apr, 2021 - Comments: 0

Siemens Digital Industries Software will acquire OneSpin Solutions, a provider of formal verification tools. The company's portfolio of formal tools and apps covers a wide range of design verification, equivalence checking, and functional safety, as well as solutions for trust and security checking. Siemens plants to add OneSpin's technology to the Xcelerator portfolio of verification tools. ... » read more

The Quest For Curvilinear Photomasks
By Mark LaPedus - 15 Apr, 2021 - Comments: 1

The semiconductor industry is making noticeable progress on the development of advanced curvilinear photomasks, a technology that has broad implications for chip designs at the most advanced nodes and the ability to manufacture those chips faster and cheaper. The question now is when will this technology move beyond its niche-oriented status and ramp up into high-volume manufacturing. For ye... » read more

Blog Review: April 14
By Jesse Allen - 14 Apr, 2021 - Comments: 0

Siemens EDA's Jake Wiltgen provides an overview of setting up an executing a fault injection campaign to prove that the IC or IP will safely operate under a faulted state caused by a random hardware failure, required to meet higher ASIL targets for ISO 26262 functional safety certification. Synopsys' Taylor Armerding considers the state of medical device security and the growing attack surfa... » read more

Many Chiplet Challenges Ahead
By Brian Bailey - 12 Apr, 2021 - Comments: 0

Over the past couple of months, Semiconductor Engineering has looked into several aspects of 2.5D and 3D system design, the emerging standards and steps that the industry is taking to make this more broadly adopted. This final article focuses on the potential problems and what remains to be addressed before the technology becomes sustainable to the mass market. Advanced packaging is seen as ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 09 Apr, 2021 - Comments: 0

Tools & IP Cadence debuted the Palladium Z2 Enterprise Emulation and Protium X2 Enterprise Prototyping systems. The Palladium Z2 is based on a new custom emulation processor, while the Protium X2 is based on Xilinx UltraScale+ VU19P FPGAs. Designed to work together with a common front-end flow, they provide 2X capacity and 1.5X performance improvements over the previous generations, and ne... » read more

Verification Effectiveness In The Face Of FPGA Complexity: The 2020 Wilson Research Group Functional Verification Study
By Harry Foster - 08 Apr, 2021 - Comments: 0

Making informed decisions backed by good data is the key to success in highly competitive, robust markets such as FPGA design and verification. Helping our community in that endeavor is the motivation behind the worldwide Wilson Research Group Functional Verification Study. We also use that information to make sure our research and development efforts continue to deliver the solutions our cu... » read more

Energy Harvesting Shows New Signs of Life
By Bryon Moyer - 08 Apr, 2021 - Comments: 1

Energy harvesting is seeing renewed activity in select markets, years after some high-profile attempts to build this into consumer electronics stalled out. Costs, manufacturing challenges, and market resistance kept this technology from moving forward, more than a decade after it was being touted as the best way forward for consumer electronics and devices that were hard to access. While sol... » read more

More Data Drives Focus On IC Energy Efficiency
By Ann Mutschler - 08 Apr, 2021 - Comments: 0

Computing workloads are becoming increasingly interdependent, raising the complexity level for chip architects as they work out exactly where that computing should be done and how to optimize it for shrinking energy margins. At a fundamental level, there is now more data to compute and more urgency in getting results. This situation has forced a rethinking of how much data should be moved, w... » read more

Formal Verification Experiences
By Siemens EDA - 07 Apr, 2021 - Comments: 0

Several companies have used formal verification to perform silicon bug hunting. That is one of the most advanced usages of formal verification. It is a complex process that includes incorporating multiple sources of information and managing numerous success factors concurrently. This paper will present a “spiral refinement” bug hunt methodology that captures the success factors and guides t... » read more

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