Foundry Capacity Is Limiting Who Competes At Leading Edge Nodes


Key Takeaways: Leading-edge node access is increasingly reserved for hyperscalers, squeezing smaller chip developers. Chiplets and advanced packaging offer a path forward, but raise cost, complexity, and risk — especially for smaller teams. Chip architecture is now driven as much by capacity, yield, and economics as by technical goals. The benefits of device scaling are sl... » read more

Chip Industry Week In Review


Deals Marvell acquired Polariton Technologies, a Swiss developer of plasmonics-based silicon photonics devices. Onto Innovation is partnering with Rigaku, combining Onto’s analysis software with Rigaku’s CD-SAXS platform for advanced semiconductor process control. Onto also agreed to acquire a 27% stake in Rigaku for about $710M. Tesla plans to use Intel’s 14A process for its T... » read more

Chip Industry Week In Review


Acquisitions and business pivots Teradyne acquired Israel-based TestInsight, a semiconductor test provider with pattern conversion, validation, and virtual test capabilities. Credo plans to acquire DustPhotonics, a developer of silicon photonics PICs for optical transceivers. Molex plans to acquire Teramount, a provider of detachable, passive-alignment fiber-to-chip connectivity solu... » read more

AI Growing Impact On Chip Design And EDA Tools


Key Takeaways Many workflows in the data center are customer-specific, which is part of the reason there is so much interest in agentic AI-enabled tools. Large systems companies are pressing EDA vendors for performance improvements to keep pace with their AI workflows. The makeup of design teams is changing as AI infiltrates more of the chip design process. Experts at the Ta... » read more

Startup Funding: Q1 2026


The new year started off with a bang for private semiconductor companies, with 18 garnering mega funding rounds exceeding $100 million, and two, Rapidus and Cerebras, reaching the $1 billion mark. Predictably, the vast majority of those are either designing chips primarily for AI inference workloads or attempting to overcome bandwidth limitations by improving interconnects from the chip level t... » read more

GPU Rowhammer Attacks Beyond Data Corruption (U. of Toronto)


A new technical paper, "GPUBreach: Privilege Escalation Attacks via GPU Rowhammer," was published by researchers at University of Toronto. Summary "GPUBreach shows that GPU Rowhammer attacks can move beyond data corruption to real privilege escalation. By corrupting GPU page tables, an unprivileged CUDA kernel can gain arbitrary GPU memory read/write, and then chain that capability into CPU... » read more

All AI Data Center Interconnects Will Be Optical Within 5 Years


I spent several days at OFC (Optical Fiber Communications Conference) 2026 in LA. The crowds were huge and the enthusiasm intense. Long-time attendees noted the shift from telecom to data center AI in just a few years. Nvidia GTC 2026 took place simultaneously in San Jose. OFC and GTC are entangled because data center AI needs optical interconnect to keep compute fed. Optical interconnect... » read more

Chip Industry Week In Review


Deals IBM and Arm are collaborating on a new dual‑architecture hardware aimed at enterprise AI and data-intensive workloads, using virtualization to boost reliability, security, scalability, and software compatibility. The goal, according to an IBM spokesperson, is to deliver side-by-side deployments of S390x-Linux and Arm-Linux virtual machines in a single kernel-based hypervisor. Nv... » read more

AI’s Potential And Limitations In Chip Design


Experts at the Table: Semiconductor Engineering sat down to discuss the opportunities and challenges of using AI in chip design, with Thomas Andersen, vice president for AI & Machine Learning at Synopsys; Sridhar Boinapally, senior director of analog/mixed signal tools/flow at Intel; Alex Starr, corporate fellow at AMD; Stuart Oberman, vice president for GPU hardware engineering at Nvidia; ... » read more

Chip Industry Technical Paper Roundup: Mar. 31


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations DiscoRD: An Experimental Methodology for Quickly Discovering the Reliable Read Disturbance Threshold of Real DRAM Chips 🔗 ETH Zurich, Rutgers University Performance Analysis of Edge and In-Sensor AI Processors: A Comparative Review 🔗 Univ... » read more

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