SRAM-based LLM inference; semantics-aware memory hierarchy for LLM reasoning; large-scale 2D material transfer; RISC-V vector performance portability; morphological mask optimization; trustworthy GenAI for automotive systems; HW-native GPU compilers for ML production.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| SHIP: SRAM-Based Huge Inference Pipelines for Fast LLM Serving 🔗 | Nvidia, Groq |
| Not All Thoughts Need HBM: Semantics-Aware Memory Hierarchy for LLM Reasoning 🔗 | USC, University of Wisconsin-Madison |
| Water-based, large-scale transfer of 2D materials grown on sapphire substrates 🔗 | AMO GmbH, RWTH Aachen University, Aixtron SE |
| Closer in the Gap: Towards Portable Performance on RISC-V Vector Processors 🔗 | KTH Royal Institute of Technology, Lawrence Livermore National Laboratory, Barcelona Supercomputing Center |
| MorphOPC: Advancing Mask Optimization with Multi-scale Hierarchical Morphological Learning 🔗 | University at Buffalo, Villanova University, IBM T. J. Watson Research Center |
| Workflow-Level Design Principles for Trustworthy GenAI in Automotive System Engineering 🔗 | University of Oldenburg, Denso Automotive |
| TLX: Hardware-Native, Evolvable MIMW GPU Compiler for Large-scale Production Environments 🔗 | UC San Diego, Meta |
Find more semiconductor research papers here.
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