tag: PDF Solutions

Platform-Led AI Analytics for the Semiconductor Ecosystem
By PDF Solutions - 07 Apr, 2026 - Comments: 0

Abstract: Semiconductor manufacturers face a mounting data crisis: modern fabrication facilities generate petabytes of complex, siloed data, yet less than 5% of it is typically used in analytics. Traditional business intelligence tools lack the scalability to handle datasets with millions of parameters, leaving critical yield and quality insights untapped. In this presentation we outline a c... » read more

Challenges In Scaling Chips To 2nm And Below
By Ed Sperling - 30 Mar, 2026 - Comments: 0

Key Takeaways Scaling to 2nm and below continues due to power improvements per watt, but progress is much more challenging and costly. Solutions to problems often create other problems due to less margin for tradeoffs, often requiring larger interposers, more chiplets, and more complex packages. New levels of precision are required throughout the design-through-manufacturing flow, re... » read more

The Petabyte Problem: How AI Is Finally Making Semiconductor Manufacturing Data Actionable
By Christophe Begue - 10 Mar, 2026 - Comments: 1

The semiconductor industry has quietly accumulated one of the most complex data challenges in modern manufacturing, and it has largely been losing the battle to solve it. Modern fabs now generate gigabytes of data per chip across probe, assembly, and test operations. Test programs routinely exceed one million test items. The largest enterprise deployments have crossed the multi-petabyte thre... » read more

Tool Matching Getting Tougher Across Test & Metrology
By Laura Peters - 10 Mar, 2026 - Comments: 0

Key Takeaways Engineers leverage both device-specific and tool-level data to identify a process "sweet spot." Tight, frequent tool-to-tool matching enables greater yield and fab flexibility. Machine learning helps capture the nuances of a tool's signature. Many people outside of the semiconductor industry wonder how humans can fabricate transistors with tens of nanometer sca... » read more

Addressing Semiconductor Cybersecurity Challenges through Robust Industry Standards and Globally Secure Frameworks
By PDF Solutions - 10 Mar, 2026 - Comments: 0

This presentation addresses critical cybersecurity challenges in semiconductor manufacturing by outlining current industry standards (SEMI E187, E188, E191) and their implementation through SMCC workgroups. It identifies key gaps in existing frameworks—particularly the inadequacy of current equipment connectivity standards for distributed collaboration and the scalability challenge of custom ... » read more

Digital Twins: The Cloud’s The Limit
By Ed Sperling - 10 Mar, 2026 - Comments: 1

Key Takeaways Digital twins are gaining traction as a way of testing different options at every step of the design-through-manufacturing flow. AI can be used to glue together disparate data types in multi-physics simulations. The promise of digital twins is huge, but multiple challenges need to be solved before it can live up to its potential. Digital twin technology is draw... » read more

Chip Industry Week In Review
By The SE Staff - 13 Feb, 2026 - Comments: 0

Geopolitics U.S. lawmakers are urging tighter export controls on advanced semiconductor manufacturing equipment (SME) to China, warning existing loopholes threaten national security. "China is working to build domestic SME by exploiting access to U.S. and allied subcomponents required to produce tools," states the letter, which also says better coordination with allies is essential. The U.S.... » read more

Beyond Optical: A New E-Beam Inspection For Advanced Chips
By Christophe Begue - 10 Feb, 2026 - Comments: 0

The semiconductor industry is defined by its relentless pursuit of smaller, faster, and more powerful chips. As we push into advanced 3D architectures like gate-all-around (GAA) transistors, a critical challenge emerges: finding the defects that kill yield. Many of these flaws are deeply buried within complex structures and impossible to see with traditional optical inspection. This creates ... » read more

Impact of the Gate and Fin Space Variation on Stress Modulation and FinFET Transistor Performance
By PDF Solutions - 10 Feb, 2026 - Comments: 0

Device scaling in advanced CMOS nodes is becoming more difficult due to patterning limitations and complex 3-D transistor integration schemes. This also makes the devices more sensitive to patterning variability. The presented study investigates the impact of poly pitch and fin pitch variability on stress-induced performance variation in 7nm FinFET transistors. Variations in critical dimension ... » read more

Chiplets Add More Inspection And Test Steps
By Anne Meixner - 10 Feb, 2026 - Comments: 0

Key Takeaways Ensuring the reliability of multi-die assemblies requires a variety of approaches to detect subsurface defects. Bonds and interconnects are especially problematic and require more inspection insertions. Ensuring reliability requires connecting fragmented data that is often siloed. The shift to multi-die assemblies is forcing changes in how chips are tested and ... » read more

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