Early Power Modeling Using SystemC And TSMC System-PPA


Power consumption is often more important than performance in today’s SoC designs because of battery size and power dissipation limitations. The dilemma is that the most leverage available to optimize power consumption is at the architectural design stage, but there often is not enough information available early enough to make accurate power decisions. On the performance side, SystemC mod... » read more

Accuracy Is Relative


I've been doing some thinking on the concept of accuracy lately in my article, Does Power Analysis Need To Be Accurate? And, I’ve come to the conclusion that there isn’t a single conclusion to be had. Accuracy is very relative to the task at hand, as well as the use case, and the very specific power requirements. And maybe the focus shouldn't be always on the accuracy, but on what the chan... » read more

Does Power Analysis Need To Be Accurate?


The mere mention of accuracy in power analysis and optimization today can trigger a contentious discussion, even among typically reserved engineers. What is needed and where? Which tools are truly as accurate as claimed? And how much accuracy is actually needed for power analysis, [getkc id="112" kc_name="estimation"], and optimization? First of all, the accuracy required really depends o... » read more

Power Analysis Plus Power Management


In my earlier blogs we've heard from some of the experts on using UPF in the successive refinement flow. We’ve talked about controlling leakage power, bringing power down, and validating power management behavior using coverage and simulation, including debug and clock domain crossing verification. In order to do the last step in the successive refinement flow, you need to use emulation be... » read more

Power — Usage Shift Leads to Methodology Shift


Power exploration and accurate power calculation of SoCs in the target application environment is getting executive attention due to the fact that companies are missing market windows because of power issues. This makes system-level power analysis and management a key measurement. Verification solutions that provide accurate power analysis data early are critical to making design decisions that... » read more

Power-Performance-Thermal


People like me are challenged in the culinary department. We believe that all we have to do is put the meat, vegetables, sauce and everything else in the recipe into the crockpot and a few hours later, out comes dinner. We (desperately) believe that we can dump the ingredients into a Ninja blender and get a healthy, tasty shake in a few minutes. (I have been politely informed that it is NOT the... » read more

Is it Hot? Ask Joules


Over the last decade it has become clear that power reduction techniques involving different parts of the chips would become more important than they had historically. In 2G cell phones everything except the real-time clock could be turned off when the phone was not in use. Pre-smartphones, a phone was either making a call (or texting, gaming, etc.) or it was off. In fact, a cell phone can’t ... » read more

Appetite For Services Grows


Semiconductor service revenues have been growing for the past year, fueled by complex thermal and power issues at advanced nodes, the difficulty of integrating more and more IP blocks, and far more techniques, languages and methodologies that engineers need to learn to be productive in the finFET generation. The services business typically acts as a bridge between down and up cycles in the c... » read more

Deciphering Performance Analysis


Simulation traditionally has been the go-to technology for improving system performance, but practices are evolving and maturing because engineering teams need to be able to simulate in multiple domains and at at multiple levels of abstraction. In addition, they need to tune the level of [getkc id="11" kc_name="simulation"] they are using to what types of models they have available, and what ki... » read more

SoC Integration Headaches Grow


As the number of IP blocks grows, so do the headaches of integrating the various pieces and making sure they perform as planned within a prescribed power envelope. This is easier said than done, particularly at the most advanced process nodes. There are more blocks, more power domains, more states and use-model dependencies, and there is much more contention for memories. There are physical ... » read more

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