Thermal Management Implications For Heterogeneous Integrated Packaging


As the semiconductor industry reaches lower process nodes, silicon designers struggle to have Moore's Law produce the results achieved in earlier generations. Increasing the die size in a monolithic system on chip (SoC) designs is no longer economically viable. The breakdown of monolithic SoCs into specialized chips, referred to as chiplets, presents significant benefits in terms of cost, yield... » read more

Batteries Take Center Stage


For any mobile electronic device, the biggest limiting factors are the size, age, type, and utilization of the batteries. Battery technology is improving on multiple fronts. The batteries themselves are becoming more efficient. They are storing more energy per unit of area, and work is underway to provide faster charging and to increase the percentage of that energy that can be used, as well... » read more

Challenges With Stacking Memory On Logic


Experts at the Table: Semiconductor Engineering sat down to discuss the changes in design tools and methodologies needed for 3D-ICs, with Sooyong Kim, director and product specialist for 3D-IC at Ansys; Kenneth Larsen, product marketing director at Synopsys; Tony Mastroianni, advanced packaging solutions director at Siemens EDA; and Vinay Patwardhan, product management group director at Cadence... » read more

Bringing Scalable Power Integrity Analysis To Analog IC Designs


Power integrity is a broad term in integrated circuit (IC) design and verification. However, when IC engineers are working through design signoff, power integrity analysis focuses on three specific aspects of a design: Power: Verify the chip design as implemented provides the total predicted power under different operating modes. Performance: Find and eliminate performance issues affect... » read more

Wrestling With Analog At 3nm


Analog engineers are facing big challenges at 3nm, forcing them to come up with creative solutions to a widening set of issues at each new process node. Still, these problems must be addressed, because no digital chip will work without at least some analog circuitry. As fabrication technologies shrink, digital logic improves in some combination of power, performance, and area. The process te... » read more

Lowering Energy Per Bit


Energy is emerging as a focal point in chip and system design, but solving energy-related issues needs to be dealt with on a much broader scale than design teams typically see. Energy is the amount of power consumed over a period of time to perform a given task, but reducing energy is a lot different than reducing power. It affects everything from operational costs and system performance to ... » read more

Do We Have An IC Model Crisis?


Models are critical for IC design. Without them, it's impossible to perform analysis, which in turn limits optimizations. Those optimizations are especially important as semiconductors become more heterogenous, more customized, and as they are integrated into larger systems, creating a need for higher-accuracy models that require massive compute power to develop. But those factors, and other... » read more

How Heterogeneous ICs Are Reshaping Design Teams


Experts at the Table: Semiconductor Engineering sat down to discuss the complex interactions developing between different engineering groups as designs become more heterogeneous, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Frank Schirrmeister, senior group director for solution marketing at Cadence; Maurizio Griva, R&D Manager at Reply; and Laurent Mai... » read more

Optimizing Power Supply


Any electrical engineer knows providing power to your board is a key feature in PCB design. While most boards can be functional, their true quality shines when the perfect level of power to components is achieved. Building and designing better power supplies is the best way to ensure the end-product has full life-cycle potential. But how do we ensure we can convert a (potentially variable) i... » read more

Von Neumann Upset


My recent article about the von Neumann architecture received some quite passionate responses, including one that thought I was attempting to slight the person. That was most certainly not the intent, given that the invention enabled a period of very rapid advancement in computers and technology in general. The process of invention and engineering are both quite similar and yet different. In... » read more

← Older posts Newer posts →