tag: Samsung

How Hard Is FD-SOI Design?
By Ann Mutschler - 21 May, 2015 - Comments: 0

Fully-depleted silicon-on-insulator ([getkc id="220" kc_name="FD-SOI"]) manufacturing technology reached of point of readiness for mass production at the end of March. Along with that, it’s now clear that while there are some impacts on the design flow, those impacts are not game changers. For one thing, the tools required are the same ones currently used for 28nm planar bulk CMOS. The onl... » read more

10nm Fab Watch
By Mark LaPedus - 21 May, 2015 - Comments: 1

When will the 10nm logic node happen? Analysts believe that foundry vendors will move into 10nm finFET volume production around 2017. Still others say the 10nm finFET ramp could take place anywhere from 2018 to 2020. The predictions are all over the map. One way to predict the timing, progress and demand for 10nm is simple: Follow the fabs. In fact, Intel, Samsung, TSMC and GlobalFound... » read more

One-On-One: Thomas Caulfield
By Mark LaPedus - 21 May, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about fabs, process technology and the equipment industry with Thomas Caulfield, senior vice president and general manager of Fab 8 at [getentity id="22819" comment="GlobalFoundries"]. Located in Saratoga County, N.Y., Fab 8 is GlobalFoundries’ most advanced 300mm wafer fab. What follows are excerpts of that discussion. SE: Last year, GlobalFoundr... » read more

Week 49: Are We There Yet?
By Anne Cirkel - 15 May, 2015 - Comments: 0

When I was a little kid my parents would pack me and my sister into the car and drive to the Mediterranean for our summer camping vacation. It was quite a haul from our home on the west side of Germany near the border with Belgium to the south of France, and as is true of any long car trip, the last stretch was the hardest. After hours in the backseat, my sister and I would be craning our necks... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 15 May, 2015 - Comments: 0

Cypress Semiconductor has made a bid to buy U.S. memory maker Integrated Silicon Solution Inc. (ISSI). In fact, Cypress may have started a bidding war against a Chinese consortium to buy ISSI. In March, a Chinese consortium of investors led by Summitview Capital entered into a definitive merger agreement to acquire ISSI. The proposed transaction values ISSI’s equity at approximately $639.5 mi... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 08 May, 2015 - Comments: 0

Investment firm TIG Advisors, a stockholder of Altera, has urged stockholders to vote against Altera’s lead independent director to the board. TIG also contends that Altera has failed stockholders by rejecting a recent acquisition bid from Intel. Altera’s 14nm foundry partner is Intel, while TSMC handles the 20nm and above foundry work. Soon, Altera will choose a 10nm foundry partner. “Sh... » read more

The Week In Review: Design/IoT
By Jesse Allen - 08 May, 2015 - Comments: 0

Embedded Mentor Graphics released a new version of their Nucleus RTOS with a focus on high-performance IoT and wearable applications. Updates include support for Dynamic Linking and Loading (DLL) capabilities in Cortex-M based cores; the ability for developers to reconfigure, update, and provision connected embedded devices that utilize cloud-based remote software services; and TI WiLink 8 m... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 01 May, 2015 - Comments: 0

After several delays due to a myriad of complex regulatory issues, Applied Materials’ proposed deal to buy Tokyo Electron Ltd. (TEL) has been scrapped. Now, Applied Materials and TEL are separately re-grouping, and are back to where they originally started as competitors in the fab tool market. Applied Materials held a conference call to explain the situation with TEL. Applied Materials... » read more

One-On-One: Dark Possibilities
By Katherine Derbyshire - 29 Apr, 2015 - Comments: 0

Professor Michael Taylor’s research group at UC San Diego is studying ways to exploit dark silicon to optimize circuit designs for energy efficiency. He spoke with Semiconductor Engineering about the post-Dennard scaling regime, energy efficiency from integrated circuits all the way up to data centers, and how the manufacturing side can help. What follows are excerpts of that conversation. (P... » read more

What EDA’s Big 3 Think Now
By Ed Sperling - 23 Apr, 2015 - Comments: 0

In the past two months the CEOs of Cadence, Synopsys and Mentor Graphics delivered their annual high-level messages to their respective user groups. Semiconductor Engineering attended all of the speeches at these conferences, as it did in 2014 (see story here). From a high level, the big issues for CEOs last year were Moore's Law, the costs of design, the impact of low power, and business-... » read more

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