tag: Siemens EDA

Continuing Challenges For Open-Source Verification
By Brian Bailey - 01 Jun, 2021 - Comments: 1

Experts at the Table: This is the last part of the series of articles derived from the DVCon panel that discussed Verification in the Era of Open Source. It takes the discussion beyond what happened in the panel and utilizes some of the questions that were posed, but never presented to the panelists due to lack of time. Contributing to the discussion are Ashish Darbari, CEO of Axiomise; Serge L... » read more

Pushing The Limits Of Hardware-Assisted Verification
By Ann Mutschler - 27 May, 2021 - Comments: 0

As semiconductor complexity continues to escalate, so does the reliance on hardware-assisted simulation, emulation, and prototyping. Since chip design first began, engineers have complained their design goals exceeded the capabilities of the tools. This is especially evident in verification and debug, which continue to dominate the design cycle. Big-iron tooling has enabled design teams to k... » read more

Signoff DRC In P&R Lets You Get Better Products To Market Faster
By Srinivas Velivala - 27 May, 2021 - Comments: 0

Trust is generally a reflection of quality. You trust someone, be it an individual or a company, because they have, over time, consistently performed high-quality work. You trust a product because your past experience with that product has been positive, or the experiences of lots of other people have been positive. With that said, quality comes in shades and percentages. Most of us will happil... » read more

MaxLinear And Calibre RealTime Digital
By Siemens EDA - 26 May, 2021 - Comments: 0

MaxLinear implemented the Calibre RealTime Digital interface for fast, iterative, signoff DRC checking and fixing during floorplanning and placement. They not only reduce the total of batch DRC iterations, but also eliminate potential late-stage issues during final physical verification signoff that are exponentially harder to fix. Adopting the Calibre RealTime Digital interface enabled MaxLine... » read more

Blog Review: May 26
By Jesse Allen - 26 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out challenges in designing processors for AI applications, the explosion in the number of weights used to language processing, and the current state of training and inference hardware. Synopsys' Mike Gianfagna explores how hyper-convergent design will push device capabilities through integration of multiple technologies, multiple protocols, and multiple archit... » read more

Blog Review: May 19
By Jesse Allen - 19 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out a project from Intel and DARPA to combine the eASIC structured ASIC technology with data interface chiplets and enhanced security protection, with manufacturing in the U.S. In a podcast, Siemens EDA's Ellie Burns and Michael Fingeroff discuss the gap between what the best AI applications can perform today versus the human brain and the challenges that hardw... » read more

Power Optimization: What’s Next?
By Brian Bailey - 17 May, 2021 - Comments: 2

Concerns about the power consumed by semiconductors has been on the rise for the past couple of decades, but what can we expect to see coming in terms of analysis and automation from EDA companies, and is the industry ready to make the investment? Ever since Dennard scaling stopped providing automatic power gains by going to a smaller geometry, circa 2006, semiconductors have been increasing... » read more

Week In Review: Design, Low Power
By Jesse Allen - 14 May, 2021 - Comments: 0

Siemens Digital Industries Software acquired Fractal Technologies, a provider of tools for IP validation and comparison checks of standard cell libraries, IO, and hard IP that reports mismatches or modeling errors, as well as comparing new IP releases close to tape-out. Siemens plans to add Fractal’s technology to the Xcelerator portfolio, joining the Solido software product family, which inc... » read more

Trends In FPGA Verification Effort And Technology Adoption
By Harry Foster - 13 May, 2021 - Comments: 0

The more we know about the bigger picture, context, historical and projected trends, or simply how other people do the same thing we do, the more efficiently and successfully we can do our specific jobs. This perspective also informs the EDA industry in how to best assist and sustain the needs of the FPGA and ASIC engineering communities. Providing this kind of information is the reason we c... » read more

Mapping Heat Across A System
By Ann Mutschler - 13 May, 2021 - Comments: 0

Thermal issues are becoming more difficult to resolve as chip features get smaller and systems get faster and more complex. They now require the integration of technologies from both the design and manufacturing flows, making design for power and heat a much broader problem. This is evident with the evolution of a smart phone. Phones sold 10 years ago were very different devices. Functionali... » read more

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