tag: Siemens EDA

From Multicore To Many-Core
By Ed Sperling - 23 Sep, 2010 - Comments: 0

By Ed Sperling Future SoCs will move from multiple cores—typically two to four in a high-power processor—to dozens of cores. But answers are only beginning to emerge as to where and how those cores will be deployed and how they will be accessed. Just as Moore’s Law forced a move to multicore architectures inside a single processor because of leakage at higher frequencies, it will begi... » read more

How Is ESL Like an Elephant?
By Jon McDonald - 23 Sep, 2010 - Comments: 0

By Jon McDonald Recently I have been involved in a number of activities with customers, bringing together their hardware, software, algorithm, and systems engineers to understand how to improve their processes using ESL capabilities. This included inviting experts from the various EDA technology areas to explore the best approaches for applying the full range of ESL capabilities to specific cu... » read more

Don’t Be Afraid of the Dark
By Barry Pangrle - 09 Sep, 2010 - Comments: 0

By Barry Pangrle I had the opportunity to attend the Hot Chips conference at Stanford in August and not surprisingly power was an important theme of many of the presentations. IBM had a presentation on adaptive energy management for their POWER7 chip, and Inphi presented on cloud computing without power penalties. Presenters from the Institute of Computing Technology at the Chinese Academy of ... » read more

Estimating Power From Mobile Device Apps
By Ann Mutschler - 09 Sep, 2010 - Comments: 0

By Ann Steffora Mutschler How do software application developers – even the ones sitting at home on their living room sofas with laptops – measure the power consumption of their application on the target device? This is a big problem today (something that is painfully obvious to owners of iPhones or Blackberries), and it will only get bigger. Software engineers may think it is not their... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 09 Sep, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: As we get to 22nm we’re... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 27 Aug, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: How does software affect ... » read more

Best Practices In Team Building
By Ed Sperling - 26 Aug, 2010 - Comments: 0

By Ed Sperling Putting analog and digital engineers in the same room used to elicit strange looks and under-the-breath comments, but most companies have gotten beyond that stage. Now the question is how to pair them up effectively, get them all on the same team—sometimes even with software engineers thrown into the mix—while still getting a product out the door on time. This is easier s... » read more

Power Conference
By Barry Pangrle - 12 Aug, 2010 - Comments: 0

By Barry Pangrle Big 10, ACC, SEC, Big 12, Pac 10? Well, if you’re thinking of universities that’s a start in the right direction (and there will be a quiz at the end of this blog). If you reside outside of the U.S., I apologize for the local reference. When organizing any technical conference, there’s always a challenge in striking a balance between presenting research that may have... » read more

Defining Power Intent
By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Ann Steffora Mutschler Designing power-sensitive SoCs has never been more challenging given the tremendous demand for power efficiency in applications ranging from smart phones to servers inside data centers. That makes describing the power control architecture of a chip through power intent essential. Specifically, explained Will Ruby, senior director of product engineering and applicat... » read more

Rethinking Models
By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Ed Sperling The move to future process nodes will require more than just new materials, better layouts and higher levels of abstraction. It also will require a fundamental re-thinking of how high-level architectural models are created and what’s included in them. While the Transaction-Level Modeling (TLM) 2.0 standard has provided significant improvements for everything from layout to ... » read more

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