tag: Siemens

Tessent MissionMode: New Inline DFT Technology
By Mentor Graphics Staff Writers - 08 Jan, 2018 - Comments: 0

Written for automotive OEMs and suppliers, this whitepaper gives an overview of design-for-test (DFT) technology. Among the topics addressed: Why is DFT important in IC design generally and critical for creating automotive ICs in particular? And how does the new Tessent MissionMode technology, teamed with some of Mentor’s other DFT offerings, pave the way for the automotive industry to develo... » read more

Reshaping Automotive Design
By Ann Mutschler - 04 Jan, 2018 - Comments: 0

The entire automotive ecosystem is being reshaped by vehicle electrification, assisted and autonomous driving, and the connectivity needed to make it all work. So far, it's not clear just how smoothly this will all come together. In this redefined world, electronics and software will provide differentiation rather than mechanical engineering and possibly even brand name, creating change on a... » read more

Sensors Drive IoT Intelligent Systems
By Greg Lebsack - 04 Jan, 2018 - Comments: 0

Back in 1980, it is believed that the first intelligent electronic sensor was proposed (by S. Middelhoek and J.B. Angell). Their idea was to combine a MEMS sensor, an analog-to-digital convertor, and a processor to analyze the analog data generated by the sensor. But, as many great electronics ideas, the technology to put this all together on a CMOS IC was not nearly ready at that time. Toda... » read more

Measuring ISO 26262 Metrics Of Analog Circuitry In ICs
By Mentor, a Siemens Business - 04 Jan, 2018 - Comments: 0

The goals for automotive electronics are zero defective parts per million (0 DPPM), and safe operation during the expected lifetime of the vehicle. The ISO 26262 standard provides procedures and metrics required before delivery to ensure systems can be expected to operate without unreasonable risk. ISO 26262 specifies circuit metrics and minimum values that are design requirements. Since the... » read more

Mixed-Signal Issues Worse At 10/7nm
By Ann Mutschler - 03 Jan, 2018 - Comments: 1

Despite increasingly difficulty in scaling digital logic to 10/7nm, not all designs at the leading edge are digital. In fact, there are mixed-signal components in designs at almost all nodes down to 10/7nm. This may seem surprising because analog scaling has been an issue since about 90nm, but these are not traditional analog components. Analog IP increasingly includes highly integrated, mix... » read more

Reflection On 2017: Design And EDA
By Brian Bailey - 03 Jan, 2018 - Comments: 0

People love to make predictions, and most of the time they have it easy, but at Semiconductor Engineering, we ask them to look back on the predictions they make each year and to assess how close to the mark they were. We see what they missed and what surprised them. Not everyone accepts our offer to grade themselves, but most have this year. (Part one looked at the predictions associated with s... » read more

Which Verification Engine?
By Ed Sperling - 02 Jan, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss the state of verification with Jean-Marie Brunet, senior director of marketing for emulation at [getentity id="22017" e_name="Mentor, a Siemens Business"]; Frank Schirrmeister, senior group director for product management at [getentity id="22032" e_name="Cadence"]; Dave Kelf, vice president of marketing at [getentity id="22395" e_name="OneSpin Solut... » read more

Reflections On 2017: Manufacturing And Markets
By Brian Bailey - 28 Dec, 2017 - Comments: 0

People love to make predictions, and most of the time they have it easy, but at Semiconductor Engineering, we ask them to look back on the predictions they make each year and to assess how close to the mark they were. To see what they missed and what surprised them. Not everyone accepts our offer to grade themselves, but many have this year. This is the first of two parts that looks at the pred... » read more

Is Verification Falling Behind?
By Brian Bailey - 21 Dec, 2017 - Comments: 1

Every year that [getkc id="74" comment="Moore's Law"] is in effect means that the [getkc id="10" kc_name="verification"] task gets larger and more complex. At one extreme, verification complexity increases at the square of design complexity, but that assumes that every state in the design is usable and unique. On the other hand, verification has not had the luxury that comes with design reuse b... » read more

Mixing Interface Protocols
By Ann Mutschler - 21 Dec, 2017 - Comments: 0

Continuous and pervasive connectivity requires devices to support multiple interface protocols, but that is creating problems at multiple levels because each protocol is based on a different set of assumptions. This is becoming significantly harder as systems become more heterogeneous and as more functions are crammed into those devices. There are more protocols that need to be supported to ... » read more

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