Data Boom Puts Pressure On NoCs, Fabrics


Key Takeaways: NoC challenges, such as wiring congestion, timing closure, and performance, must be considered in tandem with topology and placement. Topologies can be customized to meet an application’s specific data flow needs, with a system containing multiple topologies to suit different data or zones. What is challenging for one type of system, such as an SoC, switch, or AI chi... » read more

AI Won’t Kill Verification IP, But It Will Redefine It


Key Takeaways AI will enhance, not replace, verification IP by automating test generation and debug. Verification IP’s core value will increasingly lie in trust, accountability, and system-level realism, especially as designs become more complex, multi-die, and security-sensitive. AI shifts verification bottlenecks from execution to specification quality, raising expectations for c... » read more

Beating The Heat In 3D Packages


Key Takeaways: Thermal management is a central design constraint, requiring early, thorough planning. Accurate thermal simulation requires AI-driven adaptive meshing and real-world validation. Innovative STCO strategies can drastically reduce GPU peak temperature. As HPC and AI accelerators push power densities to 1kW and beyond, the heat generated by rapidly switching tran... » read more

Blog Review: Mar. 25


Synopsys' Jayraj Nair checks out how a model-based systems engineering workflow can help manage the complex multiphysics analysis needed to optimize heterogeneous systems. Siemens' Melville Bryant explains the difference between semiconductor traceability and tracking and why they're both essential, especially for complex multi-die devices. Cadence's Jamdagni Trivedi checks out VIP option... » read more

Building an AI Chip: Security, Software Development, and Lifecycle Management


The third white paper in our series, "Building an AI Chip" delves into the critical aspects of ensuring robust security and efficient software development for AI chips. As AI applications become increasingly integrated into everyday systems, the need for secure and reliable chip designs is paramount. This paper outlines essential strategies for safeguarding AI chip development, optimizing softw... » read more

Auto Ethernet 10BASE-T1S Steps Up, With Tbps On The Horizon


Key Takeaways: Automotive Ethernet, particularly 10BASE-T1S, is emerging as a replacement for CAN in vehicle networks, with higher speeds anticipated for future autonomous and connected cars. The transition to Ethernet in automotive domains is not universal; some OEMs may retain CAN or LIN in certain areas due to cost, and integrating various Ethernet standards can be technically feasib... » read more

Chip Industry Week In Review


War impacts The Iran War's toll on the chip industry is widening. Over 95% of Taiwan's energy is imported, causing the country to secure alternative sources. Korea is also heavily dependent on energy imports from the Middle East. Shortages of key materials are cropping up everywhere. Helium from Qatar, the second largest producer behind the U.S., is constrained by hostilities in the Per... » read more

Exploring The Frontiers Of Lithography And Patterning: Highlights From SPIE Advanced Lithography + Patterning 2026


Leading‑edge system-on-chip (SoC) designs at deep submicron nodes are stretching lithography and patterning capabilities across the entire manufacturing flow. Extreme ultraviolet (EUV) lithography has become central to printing advanced features, using high‑power pulsed lasers to generate a plasma light source and reflective optics to project mask patterns onto the wafer. As error budgets t... » read more

Liquid Cooling Drives Other Localized Cooling


Key Takeaways: When converting from air to liquid cooling, components without liquid may become too hot. An entire board or system must undergo thermal analysis to ensure that any components that were once cool enough remain cool. Alternative cooling techniques may be needed for components without liquid cooling. Liquid cooling is proving effective at cooling high-power chip... » read more

Advanced Packaging Limits Come Into Focus


Key Takeaways: Packaging is now a performance variable. Substrate, bonding, and process sequence determine what can be built at scale. Warpage underlies most advanced packaging failures and gets harder to control as package sizes grow. Every proposed solution, such as glass, panel processing, and backside power, solves one problem while creating another. Moore's Law has shif... » read more

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