Inside the AI Accelerator: Essential IP Design Solutions: eBook


This eBook explores how next‑gen AI accelerators break past single‑chip limits using advanced IP, high‑speed interconnects, memory interfaces, and multi‑die architectures. You’ll see how optical links push bandwidth further and how built‑in security IP keeps AI data protected without slowing performance. What you'll learn: How UALink, PCIe, CXL, and Ultra Ethernet enable sca... » read more

Blog Review: Apr. 8


Cadence's Shyam Sharma highlights new capabilities in LPDDR6, including metadata built into the data packets, rowhammer mitigations, DVFS with support for three operating voltage rails, and new efficiency modes. Synopsys' Akanksha Soni points to multiphysics simulation as a key element of ensuring automotive IC designs meet ISO 26262 requirements. Siemens' John McMillan suggests a simulat... » read more

Enhancing Silicon Reliability With In-System Test And SLM Data


Innovation in semiconductor development and manufacturing shows no signs of slowing down. Ever-larger chips at ever-smaller geometries create new challenges all the time. At the same time, competitive pressures are shrinking time to market (TTM) and putting enormous pressure on project teams. Furthermore, the wide use of electronics in safety-critical applications demands better reliability, av... » read more

AI Accelerators Usher In New Era For IC Test


Key Takeaways The parallelism in AI accelerators enables low latency but complicates failure isolation. HBM can account for 50% of package cost, so known-good stack assurance is critical. DFT and test cooperate to solve final test, singulated die test, SLT, and in-system test for data centers. AI accelerators are used for everything from training large language models to mak... » read more

Untrusted Analog Components Add Risks For Critical Infrastructure


Key Takeaways New certificate-based solutions are necessary within fabs and packaging houses to deliver trusted semiconductors. Physical IDs bind the device to the certificate, but it needs to be immutable and unclonable. Extrinsic IDs are required for analog, mixed-signal, sensor ICs as well as discrete components. Rising concern over the source and destination of chips, an... » read more

World First: MACsec IP Receives ISO/PAS 8800 Certification For Automotive And Physical AI Security


The automotive industry is entering the age of physical AI. Vehicles are rapidly transforming into intelligent, software-defined systems that perceive their environment, make real-time decisions, and act in the physical world. As autonomy expands and AI workloads move to the edge, one reality is becoming clear: If the data cannot be trusted, the AI cannot be trusted. Following independent... » read more

Moving Electrons, Not Just Vehicles


Key Takeaways: There are several ways to convert AC power from the grid to DC power in the system. Some degrade the battery faster than others. Battery management systems monitor cell voltage, current, and temperature, helping to estimate state of charge, health, and useful remaining life. A PMIC with a multi-level converter is the most efficient way to get power from the battery to ... » read more

IC Security Threats Spike With Quantum, AI, And Automotive


Key Takeaways: The top challenge for the chip architect is building post‑quantum cryptography securely into real hardware from the start, not just selecting approved algorithms. Security must be treated as a core silicon architecture decision early on, especially for long‑lived, automotive, and multi‑vendor systems. Automotive cybersecurity now requires a holistic approach span... » read more

The One Bit Problem That Can Break a System


Key Takeaways: Bit flipping is no longer a rare reliability issue but a systemic risk driven by shrinking process nodes, higher clock speeds, lower voltages, and radiation exposure, leading to silent data corruption and potential system failure. The same mechanisms that cause accidental bit flips can be deliberately exploited through techniques such as clock, voltage, laser, and rowhamm... » read more

Accelerating Automotive Innovation: SRAM Compiler Breakthroughs for 5nm and 3nm SoCs


Modern automotive SoCs must deliver extreme performance, functional safety, and long‑term reliability — all under growing power and thermal constraints. This white paper explains how next‑generation Synopsys SRAM Compiler IP for TSMC N5A and N3A helps design teams meet these challenges with measurable gains in PPA, reliability, and system robustness. Why Read this White Paper: See... » read more

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