tag: Synopsys

Choosing Between CCIX And CXL
By Ed Sperling - 19 May, 2020 - Comments: 0

Semiconductor Engineering sat down to the discuss the pros and cons of the Compute Express Link (CXL) and the Cache Coherent Interconnect for Accelerators (CCIX) with Kurt Shuler, vice president of marketing at Arteris IP; Richard Solomon, technical marketing manager for PCI Express controller IP at Synopsys; and Jitendra Mohan, CEO of Astera Labs. What follows are excerpts of that conversati... » read more

Spiking Neural Networks: Research Projects or Commercial Products?
By Bryon Moyer - 18 May, 2020 - Comments: 2

Spiking neural networks (SNNs) often are touted as a way to get close to the power efficiency of the brain, but there is widespread confusion about what exactly that means. In fact, there is disagreement about how the brain actually works. Some SNN implementations are less brain-like than others. Depending on whom you talk to, SNNs are either a long way away or close to commercialization. Th... » read more

Week In Review: Design, Low Power
By Jesse Allen - 15 May, 2020 - Comments: 0

Tools & IP Synopsys released a range of IP for TSMC's 5nm process technology. It includes interface PHY IP such as 112G/56G Ethernet, Die-to-Die, PCIe 5.0, CXL, and CCIX; memory interface IP for DDR5, LPDDR5, and HBM2/2E; die-to-die PHYs for 112G USR/XSR connectivity and High-Bandwidth Interconnect; and foundation IP including logic libraries, multi-port memory compilers, and TCAMs. Sma... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 15 May, 2020 - Comments: 0

Security Ninety-one percent of commercial applications contain outdated or abandoned open-source components —a security threat, says Synopsys in its recently released report 2020 Open Source Security and Risk Analysis (OSSRA). In the fifth annual edition of the report, Synopsys’ research team in its Cybersecurity Research Center (CyRC) found that 99% of the 1,250 commercial codebases revie... » read more

The Need For 3D IC Packaging And Design Evolution
By Rita Horner - 14 May, 2020 - Comments: 0

If you are familiar with Moore’s Law, you’ve probably read pronouncements that the premise of transistor counts doubling each year is reaching a wall due to complex process technologies and device physics limitations. Regardless of how well transistor counts continue to scale, market segments continue to drive the thirst for more compute performance and fast time to markets. Artificial i... » read more

Low-Power Analog
By Brian Bailey - 14 May, 2020 - Comments: 3

Analog circuitry is usually a small part of a large SoC, but it does not scale in the same way as digital circuitry under Moore's Law. The power consumed by analog is becoming an increasing concern, especially for battery-operated devices. At the same time, little automation is available to help analog designers reduce consumption. "Newer consumer devices, like smartphones and wearables, alo... » read more

‘More Than Moore’ Reality Check
By Ann Mutschler - 14 May, 2020 - Comments: 1

The semiconductor industry is embracing multi-die packages as feature scaling hits the limits of physics, but how to get there with the least amount of pain and at the lowest cost is a work in progress. Gaps remain in tooling and methodologies, interconnect standards are still being developed, and there are so many implementations of packaging that the number of choices is often overwhelming. ... » read more

Blog Review: May 13
By Jesse Allen - 13 May, 2020 - Comments: 0

Mentor's Neil Johnson considers when in a project certain verification methods should be deployed and the relative impact of techniques at a given point in subsystem design. Cadence's Paul McLellan looks back at the development of mobile standards with 2G, GSM, and the transition to all-digital transmission. Synopsys' Taylor Armerding highlights five online courses to boost your software ... » read more

BiST Vs. In-Circuit Sensors
By SE Staff - 13 May, 2020 - Comments: 0

Monitoring the health of a chip post-manufacturing, including how it is aging and performing over time, is becoming much more important as ICs make their way into safety-critical applications such as the central brain in automobiles. Faced with longer lifespans and a growing body of functional safety rules, systems vendors need to be able to predict when a part will fail. But as sensing auto... » read more

DDR5: The Next-Generation Technology For High Performance Computing
By Synopsys - 13 May, 2020 - Comments: 1

The rapid growth in real-time data requirements for cloud services, IoT, high-performance servers and workstations, hyperscale data centers and big data has increased pressure on memory suppliers to improve memory density and speed. This pressure has resulted in a need for new memory technology that goes beyond the current DDR4 limit of 16 Gb single die capacity and speed of 3200MT/s. Click ... » read more

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