tag: Synopsys

Accelerating Development For LP
By Brian Bailey - 14 May, 2015 - Comments: 0

Power is a limiting factor in all devices these days, and while most of the industry has seen this coming for several process nodes and a succession of mobile devices with limited battery life, the power problem remains a work in progress. No matter how much progress is made—and there has been plenty of work done in the areas of multiple power domains, dark silicon, dynamic voltage and fr... » read more

Power Management Verification Requires Holistic Approach
By Ann Mutschler - 14 May, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss power management [getkc id="10" kc_name="Verification"] issues with Arvind Shanmugavel, senior director, applications engineering at [getentity id="22021" e_name="Ansys-Apache"]; Guillaume Boillet, technical marketing manager at [getentity id="22026" e_name="Atrenta"]; Adam Sherer, verification product management director at [getentity id="22032" e_... » read more

One PHY Does Not Fit All
By Rita Horner - 14 May, 2015 - Comments: 0

Consumers expect their battery-operated mobile devices to be faster, smaller and more reliable while providing greater functionality at a reduced cost. Most of all, consumers demand longer battery life and 24/7 access to data. To meet these demands, consumer system-on-a-chip (SoC) designers must make tradeoffs between features, performance, power and cost. Enterprise SoC designers have their... » read more

How Do We Push The Limits Of Power?
By Brian Fuller - 14 May, 2015 - Comments: 0

Just how far will we be able to push down power in electronics system design? A bit farther, according to experts presenting at the recent Electronic Design Processes Symposium in Monterey. A combination of materials, techniques, technology and cultural change will get the industry there. During a panel session comparing fully-depleted silicon-on-insulator (FD-SOI) with finFET technology, J... » read more

FD-SOI Vs. FinFETs
By Ed Sperling - 13 May, 2015 - Comments: 3

Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

Virtualizing Cloud Computing With Optimized IP For NFV SoCs
By Synopsys - 13 May, 2015 - Comments: 0

The growth in Internet traffic is impacting how cloud and carrier data center operators design their compute and data networking architectures. To meet the application demands for scale-out servers and networks, designers are implementing virtual environments such as Network Function Virtualization (NFV) to achieve higher efficiency and lower the cost and time of deploying the new applications.... » read more

Blog Review: May 13
By Jesse Allen - 13 May, 2015 - Comments: 0

From corralling graphene electrons to the wild west of space, this week's top five from Ansys' Bill Vandermark reaches from the tiny to the immense. This summer, an asteroid mining firm plans to deploy a satellite to seek out mineral-rich space rocks. But someday, when mining asteroids is a commonplace affair, it may be archeologists who are doing the digging on distant planets. Could a smar... » read more

Security Progress In Some Places, Not Others
By Ed Sperling - 07 May, 2015 - Comments: 0

Security is big business, and it's increasingly part of business done between big businesses in the semiconductor market. The deal that was announced this week between NXP and Qualcomm, adding a secure NFC module to the Snapdragon chip, is certainly good business. But what's really interesting about this arrangement is that it was done between two very prominent companies, which saw a potent... » read more

IP Market Shifts Direction
By Ed Sperling - 07 May, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss intellectual property changes and challenges with Patrick Soheili, vice president of product management and corporate development at [getentity id="22242" e_name="eSilicon"]; Navraj Nandra, senior director of marketing for DesignWare analog and MSIP at [getentity id="22035" e_name="Synopsys"]; Kurt Shuler, vice president of marketing at [getentity i... » read more

Blog Review: May 6
By Jesse Allen - 06 May, 2015 - Comments: 0

How do you choose between bulk planar transistors, FinFETs, and FD-SOI? Cadence's Richard Goering got some answers during a session at the Electronic Design Process Symposium. Check out the Q&A in the second part, too. Synopsys' Michael Posner tackles a question about the differences between a prototyping bridge and hybrid prototypes and the limitations each has to solve various kinds of... » read more

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