tag: Synopsys

Why Is My Device Better Than Yours?
By Ed Sperling - 23 Oct, 2014 - Comments: 0

Differentiation is becoming a big problem in the semiconductor industry with far-reaching implications that extend well beyond just chips. The debate over the future of [getkc id="74" comment="Moore's Law"] is well known, but it's just one element in a growing list that will make it much harder for chip companies, IP vendors and even software developers to stand out from the pack. And withou... » read more

Advanced Nodes Drive Changing EDA Requirements
By Ann Mutschler - 23 Oct, 2014 - Comments: 0

With new technical requirements of today’s bleeding edge manufacturing processes propelling the ecosystem of semiconductor foundries, EDA tool suppliers and IP developers, work is being done behind the scenes like a well-conducted orchestra to make sure customer designs can flow through a foundry when the time comes. One of the areas in the design process where new processes are felt acute... » read more

Legal Battlefield In Emulation
By Brian Bailey - 23 Oct, 2014 - Comments: 1

Given the rate of research and development within the EDA industry, you might expect it to be a highly litigious industry, but apart from theft claims, there have not been that many law suits brought to bear – except in the area of [getkc id="30" comment="emulation"]. Emulation has, since its early days in the early 1990s, always been a legal battlefield, and the hostilities continue to this ... » read more

Are Models Holding Back New Methodologies
By Brian Bailey - 23 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="101" kc_name="modeling"] at abstractions above [getkc id="49" kc_name="RTL"], a factor which has delayed adoption of [getkc id="104" kn_name="virtual prototypes"] and the proliferation of system-level design and hardware/software codesign. Taking part in the discussion were Frank Schirmeister, group director,... » read more

Extending Digital Verification Techniques For Mixed-Signal SoCs With VCS AMS
By Synopsys - 22 Oct, 2014 - Comments: 0

The growth in mixed-signal system-on-chip (SoC) designs is driven by many factors, including cost, performance and power consumption. This is fueled by many industry segments, including mobile communication, automotive, imaging, medical, networking and power management. The convergence of analog and digital blocks within the same die is driving the need for SoC design teams to adopt new verific... » read more

Blog Review: Oct. 22
By Ed Sperling - 22 Oct, 2014 - Comments: 0

What is UX? The User Experience, of course. Rambus' Aharon Etengoff notes that the IoT UX is now the subject of a Harvard Business Review article. A long list of hurdles are expected at the 10nm process node, including multiple levels of local interconnects, more complex layout rules, timing problems, and a slew of others. Cadence's Richard Goering puts it all in perspective. Mentor's R... » read more

Memory Directions Uncertain
By Brian Bailey - 17 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down with a panel of experts to find out what is happening in world of memories. Taking part in the discussion are [getperson id="11073" comment="Charlie Cheng"], chief executive officer at [getentity id="22135" e_name="Kilopass Technology"]; Navraj Nandra, senior director of marketing for Analog/Mixed signal IP, embedded memories and logic libraries at [getentity ... » read more

The Week In Review: Design
By Ed Sperling - 17 Oct, 2014 - Comments: 0

Legal Mentor Graphics won a $36 million award plus royalties stemming from a patent infringement case involving EVE (Emulation & Verification Engineering), an emulation company that was purchased by Synopsys in 2012. A U.S. District Court jury in the District of Oregon found that EVE had directly and indirectly infringed on a 2001 patent entitled "Method and apparatus for gate-level simula... » read more

Blog Review: Oct. 15
By Ed Sperling - 15 Oct, 2014 - Comments: 0

Obesity makes your liver age faster, but you'll need a sophisticated biological clock to see that. Ansys' Bill Vandermark uncovers the top 5 engineering articles of the week. This one includes cyborg horses and an implanted prosthetic arm. Mentor's Colin Walls takes a look at "hard" and "soft" real time. It sounds like something out of a Salvador Dali painting. Rambus' Aharon Etengoff t... » read more

Will There Be A DDR5?
By Ed Sperling - 10 Oct, 2014 - Comments: 1

DDR4 rollouts have begun. And in the DRAM world that begs the question, 'What comes next?' The answer isn't so obvious. While there have been suggestions inside of JEDEC — the Joint Electron Device Engineering Council, which has overseen the standards for double-data-rate synchronous DRAM — to develop a DDR5 standard, it's not the only solution being considered. And in the minds of some... » read more

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