tag: Synopsys

New Uses For Emulation
By Ed Sperling - 16 Jun, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss the changing emulation landscape with Jim Kenney, director of marketing for emulation at Mentor Graphics; Tom Borgstrom, director of the verification group at Synopsys; Frank Schirrmeister, group director of product marketing for the System Development Suite at Cadence; Gary Smith, chief analyst at Gary Smith EDA; and Lauro Rizzatti, a verification ... » read more

Do SoCs Need Earthquake Insurance?
By Ann Mutschler - 13 Jun, 2014 - Comments: 1

RTL sign-off is not a new term, but with SoCs that can be comprised of up to 90% IP blocks combined with the complexities that advanced manufacturing process nodes bring, RTL sign-off activities become a process that demands a more comprehensive approach. “There is a fundamental shift going on in chip design in general in that there is a bigger focus on so-called system on chip (SoC) desig... » read more

What Exactly Is The IoT?
By Ed Sperling - 12 Jun, 2014 - Comments: 0

The Internet of Things has drawn its share of attention. It has been overhyped, derided, and in some cases dismissed as the Internet of Silos. But the idea persists, and it’s catching on. So how much substance is there behind the hype? Best guess: Quite a bit. “We do see this as being a fast-growing market,” said Jim Feldhan, president of Semico Research. “The number of connected ... » read more

S-L Power Modeling Gains Steam
By Ann Mutschler - 12 Jun, 2014 - Comments: 1

Power analysis, architectural exploration and optimization of an SoC is a hot topic of discussion today. It is well accepted this must be addressed at a higher level of abstraction because not just the hardware must be taken into account with power intent and power management structures. It has to be viewed from a system point of view, as well, where the hardware resides along with the opera... » read more

Tougher Memory Choices
By Brian Bailey - 12 Jun, 2014 - Comments: 1

Memories have become a hot topic, so Semiconductor Engineering sat down with experts during DAC to discuss some of the issues. Taking part in the conversation were Herbert Gebhart vice president of interface and system solutions in the Memory and Interfaces Division of Rambus, Bernard Murphy, chief technology officer for Atrenta; Patrick Soheili, vice president and general manager for IP Soluti... » read more

Rethinking Low Power Verification: LP + CDC Verification
By David Hsu - 12 Jun, 2014 - Comments: 1

In my last posting, we discussed some of the barriers that companies face in seeking to meet their low power verification objectives, and how the complete and integrated technologies in Synopsys’ new Verification Compiler product can help. This time, I’d like to introduce a relevant example of how unified technology solutions can help address complex design interactions in low power verific... » read more

What’s Wrong With Power Signoff
By Ed Sperling - 12 Jun, 2014 - Comments: 0

Reducing power has emerged as the most pressing issue in the history of technology. On one hand, it’s the biggest opportunity the electronics industry has ever seen. On the other, the abuse of cheap power has been linked to global warming, human catastrophe, and geopolitical strife. In all cases, the semiconductor increasingly finds itself at the vortex of all of this, and making chips more e... » read more

Building An Efficient, Tightly-Coupled Embedded System Using An Extensible Processor
By Synopsys - 11 Jun, 2014 - Comments: 0

The increasing demand for better filtering and processing capabilities of the processor within embedded systems results in a trend to shift from 8-bit microcontroller tightly coupled embedded systems towards 32-bit processor bus-based embedded systems. As a consequence, the power, performance and area (PPA) ratio of these systems also shifts in favor of performance at the cost of power and area... » read more

Blog Review: June 11
By Ed Sperling - 11 Jun, 2014 - Comments: 0

eSilicon’s Jack Harding says that EDA and semiconductors need to focus heavily on recruiting the next generation of brilliant engineers. This technology is cool, and even better it makes all the other cool technology work. It’s time to remind the rest of the world. Cadence’s Brian Fuller distills a panel discussion at DAC on computer vision—the sensors that enable driverless cars, a... » read more

Test Challenges Grow
By Mark LaPedus - 09 Jun, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss current and future test challenges with Dave Armstrong, director of business development at Advantest; Steve Pateras, product marketing director for Silicon Test Solutions at Mentor Graphics; Robert Ruiz, senior product marketing manager at Synopsys; Mike Slessor, president of FormFactor; and Dan Glotter, chief executive of Optimal+. SE: In our l... » read more

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