One-On-One: Linyong Pang


Semiconductor Engineering sat down to discuss trends in the lithography and photomask business with Linyong “Leo” Pang, the new chief product officer and executive vice president at D2S, which focuses on model-based mask data preparation as well as other mask writing technologies. What follows are excerpts of that conversation. SE: Before you arrived at D2S you were at Luminescent, whic... » read more

The Week In Review: Design


Tools Ansys-Apache rolled out a new version of its power noise and reliability tool for finFET-based designs. Given the fact that dynamic power is going to be a massive headache at 14/16nm and beyond due to much greater density, this is a first step in dealing with it. This is just the beginning of a massive effort by EDA to retool for finFETs and the 2.5D/3D architectures. Synopsys rolled... » read more

Pointing Fingers, Often In The Wrong Direction


Every design these days, regardless of whether it’s a processor, an SoC, an ASIC, FPGA or stacked die, relies on a combination of re-used and third-party intellectual property. No company—not even Intel, Apple or Samsung—has the capability of building everything itself within a highly compressed market window. There is a spectrum of IP use and re-use, of course. In some cases, it may i... » read more

One Design Kit?


On a typical System-on-Chip (SoC), CPUs, GPUs and DSPs each have unique requirements to achieve optimal results from logic libraries and memory compilers. However, at the end of the day, they all reside in the same EDA database that goes through an EDA flow of timing closure, area/power minimization and physical/logical verification before tapeout. Instead of each processor having its own de... » read more

Powerful Memories


Memory consumes more of the surface area of a die than any other component. So what changes have happened over the past few years to reduce the power consumption of memories, and where are the big opportunities for saving power? Let's take a closer look. A Growing Concern One of the key drivers for SoCs is the desire to reduce product costs, reduce form factors, reduce power, increase perfo... » read more

Leveraging Processor Extensibility To Build An Ultra Low-Power Embedded Subsystem


There is increasing demand for electronic devices to execute more functions while consuming less power and silicon area. To achieve this, systems instantiating multiple, heterogeneous processor cores optimized for low power and high performance are gaining popularity among design teams. In these systems, one or more deeply embedded processors execute a limited set of dedicated applications. The... » read more

Blog Review: May 7


What if your toothbrush could talk? Semico Research’s Michell Prunty looks at the crowd-funded connected toothbrush design. And what else can it do? Cadence’s Richard Goering attended the Electronic Design Process Symposium in Monterey and summed up the progress in ESL: Power is less of an issue (for the moment), emulation is cheaper, but there is still a dearth of expertise and standard... » read more

The Week In Review: Design


Tools CEVA integrated Bluetooth processing into its DSP cores. In addition to audio and video and always-on capabilities, the company is pitching the combination as an all-in-one, ultra-low-power solution for the wearable electronics market. So how big is this market opportunity? IDC predicts the wearable computing market will grow from 19.2 million units this year to 112 million units in 2... » read more

Hiding The Electronic Crumbs


Imagine an old Western movie where the posse tracks the outlaws by following footsteps on a dirt trail or looking for broken branches. Now fast forward to the present, where the trail is electronic, the posse is comprised of bad guys, and the loot is frequently encrypted. As any security expert will concede, every security system can be compromised, every chip can be reverse engineered and h... » read more

Blog Review: April 30


Applied Materials’ Jeremy Read points to a looming problem for the Internet of Things—legacy fabs that will require software upgrades and advanced process control. Also needed: Sensors attached to thousands of machines for predictive maintenance. Foundries are now ready for production finFETs. Cadence's Richard Goering captures the buzz at last week’s TSMC Tech Symposium, where the ro... » read more

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