EUV Challenges And Unknowns At 3nm and Below


The chip industry is preparing for the next phase of extreme ultraviolet (EUV) lithography at 3nm and beyond, but the challenges and unknowns continue to pile up. In R&D, vendors are working on an assortment of new EUV technologies, such as scanners, resists, and masks. These will be necessary to reach future process nodes, but they are more complex and expensive than the current EUV pro... » read more

Week In Review: Auto, Security, Pervasive Computing


Security Intel announced new security features for its code-named Ice Lake CPU, according to a story in SecurityWeek. The 10nm-based Xeon Scalable will have SGX trusted execution environment and several new features for memory encryption, firmware resilience, and cryptographic performance acceleration. The new Total Memory Encryption (TME) feature in the CPU will encrypt access to memory. S... » read more

Power Amp Wars Begin For 5G


Demand is increasing for power amplifier chips and other RF devices for 5G base stations, setting the stage for a showdown among different companies and technologies. The power amplifier device is a key component that boosts the RF power signals in base stations. It's based on two competitive technologies, silicon-based LDMOS or RF gallium nitride (GaN). GaN, a III-V technology, outperforms ... » read more

The Race To Much More Advanced Packaging


Momentum is building for copper hybrid bonding, a technology that could pave the way toward next-generation 2.5D and 3D packages. Foundries, equipment vendors, R&D organizations and others are developing copper hybrid bonding, which is a process that stacks and bonds dies using copper-to-copper interconnects in advanced packages. Still in R&D, hybrid bonding for packaging provides mo... » read more

Week In Review: Auto, Security, Pervasive Computing


The American Foundries Act, a bipartisan initiative to revive U.S. leadership in the global microelectronics sector, was announced by U.S. Democratic Senator Chuck Schumer from New York. “The economic and national security risks posed by relying too heavily on foreign semiconductor suppliers cannot be ignored, and Upstate New York, which has a robust semiconductor sector, is the perfect place... » read more

The Next Advanced Packages


Packaging houses are readying their next-generation advanced IC packages, paving the way toward new and innovative system-level chip designs. These packages include new versions of 2.5D/3D technologies, chiplets, fan-out and even wafer-scale packaging. A given package type may include several variations. For example, vendors are developing new fan-out packages using wafers and panels. One is... » read more

Improving Reliability For GaN And SiC


Suppliers of gallium nitride (GaN) and silicon carbide (SiC) power devices are rolling out the next wave of products with some new and impressive specs. But before these devices are incorporated in systems, they must prove to be reliable. As with previous products, suppliers are quick to point out that the new devices are reliable, although there are some issues that can occasionally surface... » read more

The Good And Bad Of Chiplets


The chiplet model continues to gain traction in the market, but there are still some challenges to enable broader support for the technology. AMD, Intel, TSMC, Marvell and a few others have developed or demonstrated devices using chiplets, which is an alternative way to develop an advanced design. Beyond that, however, the adoption of chiplets is limited in the industry due to ecosystem issu... » read more

EUV’s Uncertain Future At 3nm And Below


Several foundries have moved extreme ultraviolet (EUV) lithography into production at both 7nm and 5nm, but now the industry is preparing for the next phase of the technology at 3nm and beyond. In R&D, the industry is developing new EUV scanners, masks and resists for the next nodes. 3nm is slated for 2022, followed by 2nm a year or two later. Nonetheless, it will require massive funding... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC has announced its intention to build and operate an advanced semiconductor fab in the U.S. The fab, to be built in Arizona, will utilize TSMC’s 5nm technology and will produce 20,000 wafers per month. TSMC’s total spending on this project will be approximately $12 billion from 2021 to 2029. Construction is planned to start in 2021 with production targeted to begin in 202... » read more

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