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Beyond The Water Cooler: 2020 Report On IC/ASIC Design And Verification Trends


Verification and design engineers like to talk shop and discuss their experiences and visions. But even though engineers sharing stories around the water cooler (whatever form that takes—conferences, blogs, etc.) does provide all kinds of valuable insights, it doesn’t provide the full picture into the very large and complicated and extremely dynamic global semiconductor industry. To better ... » read more

EDA In The Cloud


Hagai Arbel, CEO of Vtool, talks with Semiconductor Engineering about the benefits of moving EDA tools to the cloud, why it has been slow to take off, and what will drive this trend in the future. » read more

Precision: A Case Study For Success


Recently, I was watching a documentary on the NASA Perseverance mission to Mars. I’ve always been fascinated by space travel and the engineering efforts to make it happen. We’ve all heard that the landing for this trip to Mars was the most precise in history, but what the documentary brought to light is the precision involved in each and every aspect of the Perseverance Rover design and dev... » read more

Signal Connectivity Checks Are Not Just For Design-For-Test Teams


By Pawini Mahajan and Raja Koneru The complexity with system-on-chip (SoC) design continues to grow, creating greater complexity of the corresponding design-for-test (DFT) logic required for manufacturing tests. Design teams are challenged not only by high gate counts and the array of internally developed and third-party IP integrated into their designs: the need to achieve high-quality manu... » read more

Continuing Challenges For Open-Source Verification


Experts at the Table: This is the last part of the series of articles derived from the DVCon panel that discussed Verification in the Era of Open Source. It takes the discussion beyond what happened in the panel and utilizes some of the questions that were posed, but never presented to the panelists due to lack of time. Contributing to the discussion are Ashish Darbari, CEO of Axiomise; Serge L... » read more

A Price To Be Paid


Ancient wisdom says you should be careful what you ask for, because you just might get it. This was certainly true many times during my career within EDA, and I am sure it is still happening today. Sometimes the outcome was not what was wanted, or the price was higher than expected. As an example, consider VHDL, the language that was meant to correct the problems of Verilog. One of the probl... » read more

Invent A New Way To Do Your Job


My friends own a farm in the southwest of France, and though I spent most of my recent decades around big cities, my village-raised roots are sending me working in the fields every time I have the time. I don’t really care what I’m assigned to, as long as soil, the nearby forest trees, and the sky (preferably blue) will take part. If the job consists of repeating actions, I like to come up ... » read more

Scaling Simulation


Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

Virtuoso ADE Assembler


Cadence Virtuoso ADE Assembler is an advanced design and simulation environment that extends the capabilities of Virtuoso ADE Explorer, adding all the tests needed to fully verify a design over all operational, process, and environmental conditions. As more analysis is required, users can take incremental advantage of the Virtuoso Variation Option to do more advanced statistical analysis on the... » read more

Hardware-Software Co-verification (ARM CPU)


In every complex SoC verification process, it is necessary to activate the CPUs during verification and to check the operation of the software they execute alongside the test’s scenarios. At a minimum, basic scenarios such as “boot rom execution” are tested, but in many cases, further scenarios are required. The CPUs themselves are usually proven IPs, but in order to verify their integrat... » read more

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