A Guide To Fast Switching GaN Challenges And Solutions

Gallium nitride (GaN) is an ideal material for applications requiring high switching speeds and minimal power losses. While the wide-bandgap material can certainly improve a system’s overall efficiency, it can also be more vulnerable to spurious turn-ons and other design challenges. That’s what makes top-of-the-line packaging, such as Infineon HiRel’s new PowIR-SMD, critical in space power designs. This blog will review common challenges in GaN applications and Infineon HiRel’s packaging solution. Download our application note for more information.

Fast switching and false turn-ons

Because GaN devices switch very fast, they can be susceptible to increased switching losses and incidental device activation, one example being the Miller effect. As a GaN transistor transitions from inactive to fully enhanced (or vice versa), incidental activation can occur when high dv/dt across the device forces a Miller current into the device parasitic capacitance. This current can charge C_gd of the device to a voltage higher than its V_th value. Incidental activation can cause high heat dissipation, making the device susceptible to failure.

Layout solutions are one way to mitigate such parasitic effects. For example, circuit designers may use a negative gate voltage to mitigate the Miller effect. While optimized PCB layouts can also support efficiency, a better solution relies in material packaging.

Parasitic inductance challenges

Additional parasitic effects, such as common-source inductance, or CSI, pose design challenges for engineers. CSI represents the inductance shared both by the gate driver current loop and power stage current loop. CSI can similarly cause switching losses and other power instability through parasitic turn-on and high-frequency ringing. Typically, the greater the CSI, the greater the power losses and thermal stress. Our application note demonstrates CSI’s effect on voltage, current, and temperature at various CSI values.

One way to mitigate CSI-based losses is to add resistance to the gate driver, but this, in turn, makes the device more vulnerable to the Miller effect. Designers can also try to minimize trace inductance, though this solution is rather design-specific.

While system-level techniques can help reduce parasitic inductance, their limitations can hinder further improvement. To address this challenge, Infineon HiRel’s rad hard GaN transistor is offered in an entirely new package, the PowIR-SMD, to bring innovative solutions to space power management.

PowIR-SMD features and advantages

The PowIR-SMD is unlike any Infineon HiRel package. It offers a completely new approach to preserving fast switching speeds and minimizing power losses. Our PowIR-SMD package is constructed with aluminum nitride (AlN), which possesses a much higher thermal conductivity than alumina. As such, our PowIR-SMD is robust against the standard –55ºC to +150ºC temperature range required in space applications.

The PowIR-SMD limits Miller capacitance and CSI at high speeds with its direct die-to-package attachment scheme and kelvin-source (KS) connection. Additional features, such as low die-free package resistance, further aid against Miller capacitance and CSI, showcasing the PowIR-SMD’s efficiency. Visit our application note for relevant circuit simulations and figures.

Another measure of package survivability is mechanical stress. We tested our PowIR-SMD package under hundreds of thermal cycles and worst-case conditions. The package is especially robust against mechanical stress, demonstrating efficacy in extreme environmental conditions.

The PowIR-SMD is not only optimal in its minimization of power losses and inductance, but also in its small size. The PowIR-SMD boasts a 39.60 mm² footprint, helping save PCB space. The PowIR-SMD is lightweight, bond-wire free, and surface mount, further demonstrating its efficiency and optimization.

Conclusion

If GaN is the future of fast-switching applications, then Infineon HiRel’s PowIR-SMD is the future of optimized packaging. Our radiation hardened 100 V GaN power transistor is an industry-first in its JANS qualification, innovative packaging, and superior performance. Learn more about our PCB design guidelines and read our latest technical article for more information.