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An 8 Bit To 12 Bit Resolution Programmable 5 MSample/s Current Steering Digital-To-Analog Converter In A 22 nm FD-SOI CMOS Technology

A programmable digital-to-analog converter with a resolution programmable decoder.

September 8th, 2021 - By: Fraunhofer IIS/EAS
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Authors:

  • Jeongwook Koh, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany
  • Shishira S. Venkatesha, Dresden University of Technology, Dresden, Germany
  • Sunil S. Rao, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany
  • Marcel Jotschke, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany
  • Jens Lienig, Dresden University of Technology, Dresden, Germany
  • Torsten Reich, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany

 

We present a 5 MSample/s current steering digital-to-analog converter which has a programmable resolution between 8 bit, 10 bit and 12 bit. A selectable 2-D unary matrix architecture and a resolution programmable decoder are proposed for the resolution programmability. The proposed current steering digital-to-analog converter is implemented in a 22 nm FD-SOI (Fully Depleted Silicon-on-Insulator) CMOS technology. The simulation verifications of the CS-DAC at three resolution modes are made. The maximum DNL of 0.06 LSB is obtained at 8 bit resolution modes, and the maximum INL (Integral Non-Linearity) of 0.53 LSB is obtained at 12 bit resolution modes. The minimum SFDR (Spurious-Free Dynamic Range) of 47.93 dBc is obtained at 8 bit resolution mode.

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