Precision Time Measurement; blockchain-based traceability; simulation in space; 6G PHY co-design.
Cadence’s Igor Krause explains Precision Time Measurement (PTM), a PCIe feature that enables precise coordination of events across multiple components with independent local time clocks.
Siemens’ John McMillan suggests the way to achieve trusted traceability across the semiconductor supply chain is by implementing a blockchain-based distributed ledger paired with a secure digital twin.
Synopsys’ Prith Banerjee points to why EDA, IP, simulation, and analysis capabilities have become essential for NASA missions, such as the recent Artemis II flight, as well as for the broader space community.
Keysight’s Richard Duvall finds that early 6G is forcing a more explicit co-design of the PHY and the wider system, with waveform design, coding, beamforming, mobility, and network architecture all part of creating a credible system under constraints.
Arm’s Christopher Seidl shares a partnership with the Eclipse CDT Cloud project to provide a coherent debugging environment for embedded C/C++ in VS Code while remaining aware of embedded hardware realities.
SEMI’s Taimur Burki highlights a new report focused on the concept of re-use and resale versus onsite treatment or offsite disposal of manufacturing wastes within the semiconductor manufacturing value chain.
And don’t miss the blogs featured in the latest Manufacturing, Packaging & Materials newsletter:
Power expert Barry Pangrle shares highlights from the TSMC Tech Symposium 2026, where the foundry rolled out an aggressive new roadmap, focusing on area, power, and latency.
Synopsys’ Anders Blom describes how larger atomistic simulations can capture defects, interfaces, temperature effects, and other real-material behavior.
Lam Research’s HJ Kim illustrates how dummy fill can reduce pattern-dependent etch variation and improve shallow trench isolation uniformity.
Intel’s Ravi V. Mahajan outlines why multi-die assemblies need more detailed roadmaps for stacking, connectivity, power, and cooling.
SEMI’s Pushkar Apte and Melissa Grupen-Shemansky contend that AI scaling will depend on energy-aware co-design across silicon, systems, data centers, and the grid.
Averroes AI’s Tareq Aljaber frames operationalization as the missing layer for deploying deep learning inspection models in fabs.
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