From Known Good Die To Known Good System With UCIe IP


Multi-die systems are made up of several specialized functional dies (or chiplets) that are assembled in the same package to create the complete system. Multi-die systems have recently emerged as a solution to overcome the slowing down of Moore’s law by providing a path to scaling functionality in the packaged chip in a way that is manufacturable with good yield. Additionally, multi-die sy... » read more

Circuit Design For Industry 4.0


By Björn Zeugmann and Olaf Enge-Rosenblatt The digitalization of industry is progressing in leaps and bounds, albeit not at the same speed everywhere. In many industries, processes can be digitalized well to very well — for example, because electronic control systems can be retrofitted from analog to digital relatively easily. In some cases, new industries emerge only because processes ha... » read more

Making It Easier To Build Platforms That Support Confidential Computing


With the rise of the cloud, computation has become highly distributed. Workloads can be running on many compute nodes and often span multiple data centers. A workload consists of a combination of code and data, and both are often valuable and sensitive. A data center is often managed by a third-party, such as Cloud Service Provider (CSP), and may reside in a different legal jurisdiction to the ... » read more

3D-IC Design: An Innovative Approach To Chip Integration


Advancements in technology have led to the development of increasingly complex and densely integrated circuits (ICs). To keep up with the ever-growing demand for high-performance and power-efficient devices, the industry has shifted toward 3D-IC design. 3D-ICs have many applications in a wide range of industries, including consumer electronics, telecommunications, computing, and automotive. Wh... » read more

High-Fidelity CFD Mesh Generation With Voronoi Diagram


We are attuned to the fact that the law of nature, or nature’s rule, drives various scientific phenomena. Humans often replicate naturally occurring phenomena to achieve a desirable outcome, similar to how scientists mimic photosynthesis to generate energy. Comparable is the case with Voronoi geometries. These geometries are widely seen in beehives, the structure of sponges, rock fragmentati... » read more

Conquer Placement And Clock Tree Challenges In HPC Designs


High-performance computing (HPC) applications require IC designs with maximum performance. However, as process technology advances, achieving high performance has become increasingly challenging. Designers need digital implementation tools and methodologies that can solve the thorny issues in HPC designs, including placement and clock tree challenges. Placement and clock tree synthesis are c... » read more

Can Compute-In-Memory Bring New Benefits To Artificial Intelligence Inference?


Compute-in-memory (CIM) is not necessarily an Artificial Intelligence (AI) solution; rather, it is a memory management solution. CIM could bring advantages to AI processing by speeding up the multiplication operation at the heart of AI model execution. However, for that to be successful, an AI processing system would need to be explicitly architected to use CIM. The change would entail a shift ... » read more

Chiplets: More Standards Needed


Recent months have seen new advances in chiplet standardization. For example, consortia such as Bunch of Wires (BoW) and Universal Chiplet Interconnect Express (UCIe) have made progress in developing standards for die-to-die (D2D) interfaces in a chiplet’s design. Far from being a new phenomenon in communication, these types of standards are established for all forms of wired and wireless com... » read more

How To Plan And Conduct Highly Accelerated Life Testing


Assessing the robustness of an electronic product is integral to successful design and performance. Highly accelerated life testing (HALT) is an important testing tool for this purpose, and its effectiveness can be maximized through careful planning prior to setup and detailed execution. What is HALT? HALT is the process of applying increased stressors to an electronic device to force failure... » read more

How eMRAM Addresses The Power Dilemma In Advanced-Node SoCs


By Rahul Thukral and Bhavana Chaurasia Our intelligent, interconnected, data-driven world demands more computation and capacity. Consider the variety of smart applications we now have. Cars can transport passengers to their destinations using local and remote AI decision-making. Robot vacuum cleaners keep our homes tidy, and smartwatches can detect a fall and call emergency services. With hi... » read more

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