Meeting Today’s Challenges For LVS


At least one thing is for certain in semiconductor development: bigger and more complex designs put lots of pressure on electronic design automation (EDA) tools and methodologies. Yesterday’s chip is today’s IP block, and entire racks of electronics are being packed into system-on-chip (SoC) devices. EDA tools must evolve constantly in order to keep pace with size and complexity while meeti... » read more

Coming In Hot: Requirements For Successful Thermal Management In 3D-IC


As the speed, density, and capabilities of electronics have all increased, power has become a first order driver in almost all electronic systems. For instance, it’s well recognized that heat is often the number one limiting factor in 3D-IC design. High-speed chips stacked close together in a small housing cause things to heat up fast. One of the most common designer responses to overheating ... » read more

Recipe To Catch Bugs Faster Using Machine Learning


We all agree that verification and debug take up a significant amount of time and are arguably the most challenging parts of chip development. Simulator performance has consistently topped the charts and is a critical component in the verification process. Still, the need of the hour is to stretch beyond simulator speed to achieve maximum verification throughput and efficiency. Artificial in... » read more

Minimizing EM/IR Impacts On IC Design Reliability And Performance


By Joel Mercier and Karen Chow As technologies and foundry process nodes continue to advance, it gets more difficult to design and verify integrated circuits (ICs). The challenges become even more apparent in 5nm and below nodes, and as the industry moves away from fin field-effect transistor (finFET) and into gate-all-around field-effect transistor (GAAFET) technologies. There are many prob... » read more

What Is UCIe?


The semiconductor industry is undertaking a major strategy shift towards multi-die systems. The shift is fueled by several converging trends: Size of monolithic SoCs is becoming too big for manufacturability Some SoC functionalities may require different process nodes for optimal implementation Desire for enhanced product scalability and composability is increasing Multi-die syste... » read more

Microelectronics For Quantum Technologies


By Kay-Uwe Giering and Andy Heinig The transition of the quantum mechanics realm into engineering applications is opening up a large number of disruptive quantum technological opportunities. Their success relies on the recent technological advancements, which enable the controlled creation of individual quantum mechanical systems as well as their direct manipulation and measurement. Quantum ... » read more

Video Compression And Forward Error Correction On Display Interfaces


To wrap up our recent series of articles on VESA video compression codecs, this month we will look at the use of video compression on digital display interfaces, using the DisplayPort 1.4 standard as an example. DisplayPort (DP) 1.4 was released in 2016, and this was the first display interface standard for external displays to include support for VESA Display Stream Compression (DSC), a vis... » read more

Improving Design Collaboration In The Age Of Remote Work


Teams of analog and mixed signal (AMS) design and layout engineers spend countless hours extracting every ounce of performance out of their design. They continually make incremental changes daily to the design until the very end, as close to tape out as possible. Each change made to the design requires corresponding changes to the circuit layout. As technology advances, accounting for the paras... » read more

Artificial Intelligence 101: It’s Math, Not Magic


The term artificial intelligence (AI) can be somewhat misleading. While the medium of intelligence is designed (and, in that sense, artificial or human-made), the intelligence itself is based on very real data. However, most people hear “AI” and think of futuristic robots or scenes from science fiction movies, not recognizing that the origin of AI is not fictional or magical — it’s math... » read more

TSN-PTP: A Real-Time Network Clock Synchronizing Protocol


In a network containing multiple nodes, the need for synchronization between the various nodes is not just instrumental but also a complicated and highly complex process. This process becomes even more tricky if we synchronize the clocks between the Manager and the Peripheral. As we know, in a real-time network, some of the nodes would behave like Managers while some would be a Peripheral. If w... » read more

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