category: Test, Measurement and Analytics

category: Auto, Security & Edge AI

Growing The Semiconductor Workforce
By Judy Davies - 12 Jul, 2018 - Comments: 2

The engine of industry is people. Nowhere is this more true than in the semiconductor industry. Think about it. This business does not depend on harvesting natural resources. It does not require that facilities be located near transportation hubs such as shipping ports. In our industry, the key to success is literally human resources. The rapid pace of innovation that characterizes the semic... » read more

Prepare For Success With A Failure Mode And Effects Analysis And Control Plan
By Tim Limmer - 12 Jul, 2018 - Comments: 0

In order to proactively handle potential process or product errors before they occur in manufacturing or on a customer’s production line, many organizations implement a Failure Mode and Effects Analysis (FMEA) and Control Plan (CP). Used as a process tool by the US military as early as 1949, FMEAs and CPs have evolved and gained popularity in many industries ranging from automotive, to pharma... » read more

Bridges Vs. Interposers
By Mark LaPedus - 12 Jul, 2018 - Comments: 4

The number of technology options continue to grow for advanced packaging, including new and different ways to incorporate so-called silicon bridges in products. For some time, Intel has offered a silicon bridge technology called Embedded Multi-die Interconnect Bridge (EMIB), which makes use of a tiny piece of silicon with routing layers that connects one chip to another in an IC package. In ... » read more

How To Test Autonomous Vehicles
By Kevin Fogarty - 12 Jul, 2018 - Comments: 1

By Kevin Fogarty and Ed Sperling The race is on to develop ways of testing autonomous vehicles to prove they are safe under most road conditions, but this has turned out to be much more difficult than initially thought. The autonomous vehicle technology itself is still in various stages of development, with carmakers struggling to fine-tune AI algorithms that can guide robots on wheels th... » read more

Preparing For A 5G World
By Ed Sperling - 12 Jul, 2018 - Comments: 0

Semiconductor Engineering sat down to talk about challenges and progress in 5G with Yorgos Koutsoyannopoulos, president and CEO of Helic; Mike Fitton, senior director of strategic planning and business development at Achronix; Sarah Yost, senior product marketing manager at National Instruments; and Arvind Vel, director of product management at ANSYS. What follows are excerpts of that conversat... » read more

Defect Reduction At 7/5nm
By Ed Sperling - 12 Jul, 2018 - Comments: 0

Darin Collins, director of metrology at Brewer Science, talks about the cause of defects at advanced nodes and how material purity increasingly plays a role in overall quality and yield. » read more

Accelerating Test Pattern Bring-Up For Rapid First Silicon Debug
By Mentor, a Siemens Business - 12 Jul, 2018 - Comments: 0

Reducing the time spent on silicon bring-up is critical in getting ICs into the hands of customers and staying competitive. Typically, the silicon bring-up process involves converting the test patterns to a tester-specific format and generating a test program that is executed by Automatic Test Equipment (ATE). This standard silicon bring-up flow is becoming too slow and expensive, especially fo... » read more

NIWeek Test Talk
By Jeff Dorsch - 12 Jul, 2018 - Comments: 0

Semiconductor Engineering sat down with David Hall, Chief Marketer, Semiconductor, of National Instruments, and Mike Watts, NI’s Senior Solutions Marketer, Semiconductor Test, during NIWeek 2018 in Austin, Texas. “One of the opportunities for National Instruments is that over the last 10 years, we’ve seen larger semiconductor organizations change the way they do testing both for R&... » read more

New Transistor Types Vs. Packaging
By Ed Sperling - 11 Jun, 2018 - Comments: 0

Plans are being formulated for the rollout of multiple types of gate-all-around FETs and literally dozens of advanced packaging options. The question now is which ones will achieve critical mass, because there aren't enough chips in the world to support all of them profitably. FinFETs, which were first introduced by Intel at 22nm, are running out of steam. While they will survive 10/7nm, and... » read more

Sacrificial Laser Release Materials For RDL-First Fan-Out Packaging
By Brewer Science - 11 Jun, 2018 - Comments: 0

The semiconductor industry is in a new age where device scaling will not continue to provide the cost reductions or performance improvements at a similar rate to past years when Moore’s law was the guiding principle for IC scaling. The cost of scaling below 7 nm nodes is rising substantially and requires significant investment in capital equipment and R&D spending for next-generation lithogra... » read more

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