Solving Real-World AI Bottlenecks


The race to build smarter and faster AI chips continues to surge. This is especially true in autonomous vehicles that interpret the world in milliseconds, edge accelerators that push trillions of operations per second, hyperscale data-center processors that drive massive workloads, and next-generation consumer devices that demand ever-higher intelligence. As modern system-on-chip (SoC) architec... » read more

How The EDA Industry Will Evolve In 2026


AI will continue to impact every facet of the EDA industry. Pressure will mount in 2026 on design teams to drive productivity gains while technical complexity continues to escalate. This will reshape how teams work and the tools they use. Success will be determined by balancing the trade-offs between integrated platforms and best-of-breed toolchains and developing talent internally rather than ... » read more

Opening The Door To STCO: Hierarchical Device Planning


By Todd Burkholder and Per Viklund The heterogeneous integration of multiple chiplets in a single packaging platform is critical for many high-performance market segments, such as AI, hyperscalers, high-performance computing, cloud data centers, neural processors, and even autonomous vehicles. This increased design complexity has led to an explosion in device complexity and pin counts. It... » read more

Does Your RISC-V Core Meet The Standard?


Key Takeaways Architectural conformance and implementation verification are necessary but different for RISC-V designs, yet few verification engineers have experience on the conformance side. While RISC-V enables flexibility, there is a potential for ecosystem fragmentation. It is mathematically impossible to test every instruction combination, so engineers are moving beyond just "bl... » read more

Building Trust At The Silicon Level: Secure Storage Solution For OTP IP


As semiconductor designs advance into cutting-edge nodes, the complexity of integrated IP blocks from diverse sources is expanding the attack surface. Traditional software-only security measures are increasingly inadequate, as attackers exploit vulnerabilities beneath the software layer. To counter these risks, designers of AI accelerators, automotive domain controllers, aerospace systems, a... » read more

Heterogeneous Multicore System IP


For many of today’s embedded applications, compute requirements demand multiple cores (compute units). These applications also run various types of workloads. A heterogeneous multicore system enables designers to reduce energy and area costs while meeting performance requirements across various workloads. Data crunching by these multiple cores also puts a huge demand on the interconnect and m... » read more

Multi-Die Assemblies Require More Detailed Test Plan Earlier


Key Takeaways Design for test takes on new urgency in complex multi-die assemblies, where it can be used to minimize downstream errors and the cost of fixing them. DFT needs to be increasingly detailed due to more connections and the inability to access some components. DFT strategies need to be developed earlier and may require multiple testing approaches. Multi-die assembl... » read more

AI’s Impact On Engineering Jobs May Be Different Than Expected


Key Takeaways: AI is expected to eliminate many repetitive, entry-level tasks, but that may allow engineering students trained on the latest tools to start in more senior positions. AI is a force multiplier. It can accelerate the learning curve for junior engineers. While AI is very good at solving multi-dimensional problems, domain expertise, critical thinking, and sanity checks wil... » read more

The Next-Generation of Circuit Simulation in RF EDA


Radio-Frequency (RF) Electronic Design Automation (EDA) is at a turning point. Historically, engineers adapted their workflows to rigid software tools, often sacrificing flexibility and efficiency. With the rise of increasingly complex, multi-domain hardware systems, these constraints are no longer sustainable. Keysight is reimagining RF simulation as a programmatically controlled, extensible p... » read more

Blog Review: Jan. 28


Synopsys' Dana Neustadter and Vincent van der Leest argue that a hardware-based approach to security is required to fully address the risks introduced by modern AI architectures and the distributed workloads they support. Siemens EDA's Tova Levy examines multiphysics challenges in 3D-IC designs and outlines three design imperatives to identify risks earlier and support PPA, reliability, and ... » read more

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