DAC 2017: A Glimpse Of How The Future Is Enabled


Last week’s Design Automation Conference in Austin gave great examples on how the future is enabled with next generation tools today. My favorite portions were Uhnder’s overview on “Agile Emulation” in the cloud, SirusXM’s presentation on how they used our portfolio of emulation and FPGA-based prototyping, the panel on “Smarter Verification” that I had organized and – of course ... » read more

A Learning Machine For Machine Learning


Artificial intelligence and machine learning are hot. Many, many startups, exciting new applications and lots of venture money. The technology promises to change the world. Whether it’s autonomous vehicles, domestic robots or machines that replace doctors and lawyers, the implications are astounding, and somewhat frightening. Let’s put the socio-economic dimension of this discussion aside f... » read more

Verification In The Cloud


By Ed Sperling Leasing of cloud-based verification resources on an as-needed basis is finally beginning to gain traction after more than a decade of false starts and over-optimistic expectations. All of the major EDA vendors now offer cloud-based services. They view this as a way of either supplementing a chipmaker's existing resources at various peak use times, or for small and midsize com... » read more

Open-Source NFV


The OPNFV Summit in Beijing earlier this month brought together developers, end users, and other communities all working to advance open source Network Functions Virtualization (NFV). What's new is an effort to make NFV more efficient. A highlight of the event was the announcement of an exciting new platform for accelerating NFV software development, the “NFV PicoPod”. Developed in coll... » read more

Hybrid Emulation


Semiconductor Engineering sat down to discuss the growing usage of hybrid verification approaches with Frank Schirrmeister, senior group director of product management & marketing for [getentity id="22032" e_name="Cadence"]; Russ Klein, program director for pre-silicon debug products at [getentity id="22017" e_name="Mentor, a Siemens Business"]; [getperson id="11027" comment="Phil Moorby"],... » read more

Introducing An Embedded Multicore Framework For Advanced AMP Architectures


Heterogeneous multicore systems, that combine two or more microprocessors, are quickly becoming the de-facto architecture in the embedded industry. The asynchronous multiprocessing (AMP) software architecture enables designers to leverage the compute bandwidth provided by these heterogeneous processors. The best way to fully realize the potential of an AMP architecture is to implement it within... » read more

Start Your HBM/2.5D Design Today


High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology. In June 2015, AMD introduced its Fiji processor, the first HBM 2.5D design, which comp... » read more

ARC HS4x And HS4xD CPUs


Synopsys’ DesignWare ARC CPUs comprise a family of highly configurable and customizable processor cores, which ship in nearly two billion chips per year. ARC’s popularity in embedded devices makes the company second only to ARM in the number of chips that integrate its licensable CPUs. More than 230 ARC licensees use the cores in products that span a broad range of embedded applications, su... » read more

Choosing The Right Superlinting Technology For Early RTL Code Signoff


No one can afford to go through weeks of verification only to discover problems in the register- transfer level (RTL) code that might not be functionally wrong, but do not follow established rules for successful implementation. Traditional lint tools have become ineffective in evaluating RTL code for today’s larger, more complex designs. However, superlinting technology, such as the Cadence J... » read more

Blog Review: June 28


Mentor's Craig Armenti notes the benefits, and challenges, of investing in modular design in the PCB domain. Cadence's Paul McLellan covers a DAC chat with CEO Lip-Bu Tan on the rise of advanced packaging and investments in AI and autonomous driving. Synopsys' Jim Hartnett examines some of the challenges and tradeoffs involved in building good security practices in hospital environments. ... » read more

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