category: System-Level Design

category: Auto, Security & Edge AI

GPUs May Speed UP EDA Algorithms
By Ann Mutschler - 25 Jul, 2013 - Comments: 1

The sequential EDA algorithms of old cannot keep pace with increasing design complexity, which is driving the industry to look at parallelism and other computational architectures such as the graphical processing unit (GPU). A 10X or 20X speedup for gate-level simulations means that a test that runs today in a week will run in less than a day, and a test that runs today in a month will run i... » read more

Experts At The Table: Automotive Electronics
By Ann Mutschler - 25 Jul, 2013 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss the opportunities in automotive electronics with Alexandre Palus, principal SoC architect at Altera; Aveek Sarkar, VP of product engineering & support at Apache; Mladen Nizic, engineering director, mixed signal solution at Cadence; and Stephen Pateras, product marketing director, silicon test solutions at Mentor Graphics. Wh... » read more

Raising The IP Abstraction Level
By Ed Sperling - 25 Jul, 2013 - Comments: 0

By Ed Sperling An increasing reliance on commercial and re-used IP and more emphasis placed on software development is adding even more pressure onto semiconductor design teams to figure out the benefits and limitations of myriad possible choices earlier in the design process. Design teams already are under pressure to meet increasingly tighter market deadlines, and it is stressing every pa... » read more

System-Level Security Issues
By Ed Sperling - 25 Jul, 2013 - Comments: 0

The more things that are put onto a single SoC, the greater the possibility that the entire system can be hacked. Centralization is good from the standpoint of speed, cost and power, but it’s not always good from the standpoint of security. This may sound contrary to the experience of corporate IT departments, but there’s a reason behind this. In the case of data centers, the advent of t... » read more

Strategies To Prevent IC Failures In Volume Production
By Various Writers - 25 Jul, 2013 - Comments: 0

When IC devices are produced and shipped to end customers, it is important that they will function as specified in the application environment. This paper outlines strategies and practices used to statistically sample, and predict how a device will operate over time. The practices outlined are believed to be best in class techniques for a successful product launch. These strategies most likely ... » read more

DFTMAX Compression Shared I/O
By Various Writers - 25 Jul, 2013 - Comments: 0

A significant design trend in recent years has been the widespread use of ARM multicore processors in systems-on-chip (SoCs). Designers’ ability to easily and cost-effectively employ multiple, high-performance embedded processors to meet the computational demands of the end application has helped fuel the explosive growth in mobile computing, networking infrastructure, and digital infotainmen... » read more

Strategies To Prevent IC Failures In Volume Production
By Various Writers - 25 Jul, 2013 - Comments: 0

When IC devices are produced and shipped to end customers, it is important that they will function as specified in the application environment. This paper outlines strategies and practices used to statistically sample, and predict how a device will operate over time. The practices outlined are believed to be best in class techniques for a successful product launch. These strategies most likely ... » read more

DFTMAX Compression Shared I/O
By Various Writers - 25 Jul, 2013 - Comments: 0

A significant design trend in recent years has been the widespread use of ARM multicore processors in systems-on-chip (SoCs). Designers’ ability to easily and cost-effectively employ multiple, high-performance embedded processors to meet the computational demands of the end application has helped fuel the explosive growth in mobile computing, networking infrastructure, and digital infotainmen... » read more

Unifying Hardware-Assisted Verification And Validation Using UVM And Emulation
By Various Writers - 25 Jul, 2013 - Comments: 0

Successful approaches to improve verification productivity are to increase the speed of verification and begin validating software/hardware integration very early in the design process. Historically, verification and validation platforms have been developed as separate flows, preventing reuse of modules and methods between the two. As a consequence, various customized verification and validatio... » read more

What Really Matters: User Care-Abouts In Hardware-Assisted Verification
By Frank Schirrmeister - 24 Jul, 2013 - Comments: 0

By Frank Schirrmeister Sports analogies often work well and, most certainly, they do for electronics development. When again I ran across the VISA advertisement in which Dick Fosbury is featured with his win in the high-jump competition at the 1968 Summer Olympics, I had to smile as it reminded me of hardware-assisted verification (I know, I know…twisted, you might say). Just as Fosbury chan... » read more

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