TAP-2.5D: A Thermally-Aware Chiplet Placement Methodology for 2.5D Systems


Abstract "Heterogeneous systems are commonly used today to sustain the historic benefits we have achieved through technology scaling. 2.5D integration technology provides a cost-effective solution for designing heterogeneous systems. The traditional physical design of a 2.5D heterogeneous system closely packs the chiplets to minimize wirelength, but this leads to a thermally-inefficient design... » read more

A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies for Microelectronic Packaging: Through-Si-via and Solder Bumping Process


Abstract "With the continuous miniaturization of electronic devices and the upcoming new technologies such as Artificial Intelligence (AI), Internet of Things (IoT), fifth-generation cellular networks (5G), etc., the electronics industry is achieving high-speed, high-performance, and high-density electronic packaging. Three-dimensional (3D) Si-chip stacking using through-Si-via (TSV) and sol... » read more

Holistic Die-to-Die Interface Design Methodology for 2.5-D Multichip-Module Systems


Abstract: "More than Moore technologies can be supported by system-level diversification enabled by chiplet-based integrated systems within multichip modules (MCMs) and silicon interposer-based 2.5-D systems. The division of large system-on-chip dies into smaller chiplets with different technology nodes specific to the chiplet application requirement enables the performance enhancement at the ... » read more

Research on the Humidity Resistance Reliability of Different Packaging Structures


Abstract "Packaging process is an indispensable part in the process of electronic components manufacturing, and its packaging quality directly affects the nominal power, reliability and other functions of the product in the subsequent application process. Through the research on the humidity resistance reliability of different packaging structures, C-Mount packaging structure, TO packaging str... » read more

A review of interconnect materials used in emerging memory device packaging: first- and second-level interconnect materials


Abstract "The main motivation of this review is to study the evolution of first and second level of interconnect materials used in memory device semiconductor packaging. Evolutions of bonding wires from gold (Au) to silver (Ag) or copper (Cu) have been reported and studied in previous literatures for low-cost solution, but Au wire still gives highest rating in terms of the performance of tempe... » read more

Revealing the Effect of Nanoscopic Design on the Charge Carrier Separation Processes in Semiconductor-Metal Nanoparticle Gel Networks


Abstract: "In this paper, it is shown that the nanoscopic design of combining semiconductors and noble metals has a direct impact on the macroscopic (electrochemical) properties of their assembled, hyperbranched, macroscopic gel networks. Controlled and arbitrary deposition of gold domains on CdSe/CdS nanorods leads to tipped and randomly decorated heteroparticles, respectively. Structur... » read more

Light-Emitting V-Pits: An Alternative Approach toward Luminescent Indium-Rich InGaN Quantum Dots


Abstract: "Realization of fully solid-state white light emitting devices requires high efficiency blue, green, and red emitters. However, challenges remain in boosting the low quantum efficiency of long wavelength group-III-nitride light emitters through conventional quantum well growth. Here, we demonstrate a new direct metal–organic chemical vapor deposition approach to grow In-rich InGa... » read more

The Role of InGaN Quantum Barriers in Improving the Performance of GaN-based Laser Diodes


Abstract: "In this work, different aspects which have influences on device performance of blue laser diodes (LDs) when using InGaN instead of GaN as quantum barrier (QB) layers are investigated theoretically and experimentally. In the modeling calculation, it is found that the threshold current of LDs with InGaN QB layers is reduced obviously, but the slope efficiency is not largely improved... » read more

Crystal Phase Control during Epitaxial Hybridization of III-V Semiconductors with Silicon


Abstract: "The formation and propagation of anti-phase boundaries (APBs) in the epitaxial growth of III-V semiconductors on Silicon is still the subject of great debate, despite the impressive number of studies focusing on this topic in the last past decades. The control of the layer phase is of major importance for the future realization of photonic integrated circuits that include efficien... » read more

Weight Adjustable Photonic Synapse by Nonlinear Gain in a Vertical Cavity Semiconductor Optical Amplifier


Abstract: "In this paper, we report a high-speed and tunable photonic synaptic element based on a vertical cavity semiconductor optical amplifier (VCSOA) operating with short (150 ps-long) and low-energy (μW peak power) light pulses. By exploiting nonlinear gain properties of VCSOAs when subject to external optical injection, our system permits full weight tunability of sub-ns input light p... » read more

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