Manufacturing Bits: March 31


Shish kebab nano necklaces Using a directed self-assembly (DSA) process, Georgia Institute of Technology has developed a method to make nanometer-scale, chip-based necklaces. The technique could enable organic-inorganic structures, which resemble a tiny shish kebab or a centipede. The structures are made with various materials, such as semiconductors, magnetics, ferroelectrics and others. ... » read more

Challenges Mount For Patterning And Masks


Semiconductor Engineering sat down to discuss lithography and photomask trends with Uday Mitra, vice president and chief technology officer for the Etch Business Unit at [getentity id="22817" e_name="Applied Materials"]; Pawitter Mangat, senior manager and deputy director for EUV lithography at [getentity id="22819" comment="GlobalFoundries"]; Aki Fujimura, chief executive at [getentity id="228... » read more

5 Issues Under The SPIE Radar


As usual, the recent SPIE Advanced Lithography Conference was a busy, if not an overwhelming, event. At the event, there were endless presentations on the usual subjects, such as design, patterning, metrology and photoresists. And as in past years, one left the event with more questions than answers. At this year’s event, the most obvious question was (and still is) clear: Will extreme ult... » read more

Issues And Options At 5nm


While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

Manufacturing Bits: March 10


Hi-tech pens The University of California at San Diego has developed a hi-tech ballpoint pen. Researchers have taken off-the-shelf ballpoint pens and filled them with bio inks. With so-called enzymatic-ink-based roller pens, users are able to draw biocatalytic sensors on a surface. [caption id="attachment_18297" align="alignleft" width="300"] Researchers draw sensors capable of detecting... » read more

More Lithography Options?


Lithographers face some tough decisions at 10nm and beyond. At these nodes, IC makers are still weighing the various patterning options. And to make it even more difficult, lithographers could soon have some new, and potentially disruptive, options on the table. On one front, the traditional next-generation lithography (NGL) technologies are finally making some noticeable progress. For examp... » read more

Manufacturing Bits: March 3


Nanoimprint consortium CEA-Leti has launched a nanoimprint lithography program in an effort to propel the technology in the marketplace. The imprint program, dubbed Inspire, will focus on various and emerging non-semiconductor applications, according to Laurent Pain, patterning program manager and business development manager within the Silicon Technologies division at the French R&D or... » read more

Manufacturing Bits: Feb. 24


EUV progress report At the SPIE Advanced Lithography conference in San Jose, Calif., ASML Holding said that one customer, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), has exposed more than 1,000 wafers on an NXE:3300B EUV system in a single day. This is one step towards the insertion of EUV lithography in volume production. During a recent test run on the system, TSMC exposed 1,022 w... » read more

How To Extend Litho Scaling


IC mask [getkc id="80" comment="lithography"] today is sophisticated and complex. It's also a work in progress with a lot of unknowns as the industry struggles to increase productivity while reducing risk. The bulk of the work currently is focused on trying to figure out what would be a practical scheme for patterning lithography that could be used at 10nm and 7nm, said Gandharv Bhatara, Ca... » read more

Integrating DSA


As previous articles in this series have shown, directed self-assembly may be a promising alternative for manufacturers seeking to shrink feature sizes in the face of a stalled exposure tool roadmap. It is simpler than some other frequency-multiplication techniques, can be implemented with existing equipment, and does not appear to introduce insurmountable defect issues of its own. Which does n... » read more

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