tag: EDA

Disturbance In Verification
By Brian Bailey - 08 Jun, 2026 - Comments: 3

When writing my recent story about agentic verification, there was one quote from Abhi Kolpekwar, senior vice-president and general manager at Siemens EDA, that really struck a chord. He was talking about the additional token costs that would be consumed when a verification engineer starts asking the agents to do what was considered to be part of their job. "Consider the total cost of owners... » read more

Toward Agentic Verification
By Brian Bailey - 28 May, 2026 - Comments: 1

Key Takeaways: Agentic verification provides flow orchestration for common repetitive tasks. Capabilities will expand when tools can learn from a larger context, including the specification. Design houses need to fully understand the costs and benefits and plan accordingly. Agentic verification is more than a buzzword. It is a pivotal moment in the evolution of verification ... » read more

Harnessing Artificial Intelligence For Trusted IC Signoff
By Carey Robertson - 14 May, 2026 - Comments: 0

After years of behind-the-scenes work, artificial intelligence (AI) is now embedded throughout the technology world—from space exploration to everyday apps on our smartphones. There is a circular feedback loop in which we design more powerful computer chips to train AI models and use them; and then use those AI models to design even more powerful chips. The use of AI in the software used for ... » read more

Hardware From Specifications Using AI
By Brian Bailey - 06 May, 2026 - Comments: 0

There is a lot of excitement these days surrounding the idea that AI could make it possible to go from a specification to a design with absolutely no hardware skills. Well, get in line, because this is the umpteenth potential technology that was going to make that possible. Don't get me wrong, it just might do it, but will this be an implementation that is reliable, have decent performance, ... » read more

Creating Agentic EDA Methodologies
By Brian Bailey - 30 Apr, 2026 - Comments: 1

Key takeaways Agentic methodologies need to be able to reason across multiple data formats and abstractions. It is not clear how much data from previous designs is useful in new designs. Standards may help, but the lack of them may only impact cost. The relationship between tools and methodologies is bidirectional. Tools enable methodologies, and methodologies are dependent ... » read more

AI Growing Impact On Chip Design And EDA Tools
By Ed Sperling - 15 Apr, 2026 - Comments: 0

Key Takeaways Many workflows in the data center are customer-specific, which is part of the reason there is so much interest in agentic AI-enabled tools. Large systems companies are pressing EDA vendors for performance improvements to keep pace with their AI workflows. The makeup of design teams is changing as AI infiltrates more of the chip design process. Experts at the Ta... » read more

EDA And IP Numbers Up Again, But Numbers Are More Nuanced
By Ed Sperling - 13 Apr, 2026 - Comments: 0

EDA and Semiconductor IP revenue grew 10.3% in Q4 2025 to $5.466 billion, up from $4.955 billion in the same period in 2024, continuing the double-digit run for the tools and IP business that has been underway for the past few years. CAE, the largest EDA category, rose 9.4% to $2.083 billion in Q4, versus $1.761 billion in Q4 2024. Non-reporting IP companies — a segment dominated by Arm �... » read more

AI’s Potential And Limitations In Chip Design
By Ed Sperling - 01 Apr, 2026 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the opportunities and challenges of using AI in chip design, with Thomas Andersen, vice president for AI & Machine Learning at Synopsys; Sridhar Boinapally, senior director of analog/mixed signal tools/flow at Intel; Alex Starr, corporate fellow at AMD; Stuart Oberman, vice president for GPU hardware engineering at Nvidia; ... » read more

All Software Is Hardware-Dependent
By Brian Bailey - 30 Mar, 2026 - Comments: 1

I was lucky in my early career that I found two sets of great mentors. The first happened recently after graduating when I joined the Hilo development team. Members of that team included Phil Moorby, Simon Davdimann, Peter Flake, and others. They all had very different coding personalities, but most importantly, they worked as a team and used good foundational processes. One outcome of that ... » read more

AI Won’t Kill Verification IP, But It Will Redefine It
By Ann Mutschler - 26 Mar, 2026 - Comments: 0

Key Takeaways AI will enhance, not replace, verification IP by automating test generation and debug. Verification IP’s core value will increasingly lie in trust, accountability, and system-level realism, especially as designs become more complex, multi-die, and security-sensitive. AI shifts verification bottlenecks from execution to specification quality, raising expectations for c... » read more

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