tag: IP

Effects Unknown
By Ed Sperling - 22 Apr, 2011 - Comments: 0

f you really want to know what’s going on inside the IC design world, pick up a copy of the annual reports of the largest foundries. Then triangulate that with the earnings reports of the largest makers of computers and mobile electronics and the makers of EDA tools and IP. All three areas are experiencing a massive uptick, which is good news considering the travails of the past couple of ... » read more

The Quest For A Better IP Integration Methodology
By Ed Sperling - 31 Mar, 2011 - Comments: 0

By Ed Sperling With the amount of IP in SoC designs now hitting an estimated 70% to 90%, companies are scrambling to figure out a way to more consistently integrate that IP and to test that it will work as expected. This is easier said than done, however, for a number of reasons: There are numerous types of IP, ranging from I/O to logic and memory. Not all IP is of equal quality. ... » read more

Engineering’s Growing Blacklist
By Ed Sperling - 25 Mar, 2011 - Comments: 0

The number of system-level design flaws is rising, and they’re not just little mistakes. These are high-profile errors that are making headlines all over the globe. While it’s debatable whether Toyota’s problem was a hardware or software design glitch, the simple fact is there was a design flaw somewhere. That’s true for the BP Gulf of Mexico leak, regardless of who’s responsible f... » read more

The Growing Importance Of Subsystems
By Ed Sperling - 24 Feb, 2011 - Comments: 0

By Ed Sperling A growing reliance on third-party IP is beginning to expand well beyond just IP blocks and into full subsystems, opening significant growth opportunities for companies competing in this market as well as enormous business and technical challenges. The IP market is ripe for this kind of convergence. Complexity at advanced process nodes coupled with time-to-market demands has e... » read more

Tailoring IP, Tools And Flows
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler As SoC and system complexity rises continually and software drives much more in a system, specific vertical application areas will require tailored IP and tool flows to allow designers to meet time-to-market demands. Today, many systems are designed around a platform, which contains most of the STAR IP—processors, GPUs, memory controllers, interconnects, memory s... » read more

Tailoring IP, Tools And Flows
By Ann Mutschler - 27 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler As SoC and system complexity rises continually and software drives much more in a system, specific vertical application areas will require tailored IP and tool flows to allow designers to meet time-to-market demands. Today, many systems are designed around a platform, which contains most of the STAR IP—processors, GPUs, memory controllers, interconnects, memory s... » read more

Experts At The Table: IP Integration Hurdles
By Ed Sperling - 17 Dec, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss IP integration issues with Ken Brock, senior staff product marketing manager for logic libraries in Synopsys’ Solutions Group; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversati... » read more

Supply Chain Adjusts To Design At The System Level
By Ed Sperling - 16 Dec, 2010 - Comments: 0

By Ann Steffora Mutschler System-level design is impacting the supply chain at many levels. Software suppliers, IP providers, semiconductor companies, system integrators and OEMs are challenged to work ever more closely together and find a new balance of power for who controls what in the content of an SoC. “We see more and more the design chain driving how our tools work together,” Fra... » read more

The Ever-Growing System Challenge
By Jon McDonald - 10 Dec, 2010 - Comments: 0

It used to be easy to define a system. It was an ASIC, an ASSP or even an SoC. Increasingly, however, that definition isn’t nearly broad enough. With power issues now spreading across an entire device and software being used to manage everything from embedded applications to board-level functionality, the system is now much bigger than a single chip or even a system in package. It now enc... » read more

Experts At The Table: IP Integration Hurdles
By Ed Sperling - 10 Dec, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss IP integration issues with Ken Brock, senior staff product marketing manager for logic libraries in Synopsys’ Solutions Group; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversati... » read more

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