A Dual-Mode Error-Correcting Code Solution For 50Gbps Ethernet


The increase in bandwidth is driving more innovations in the Ethernet physical layer technology to combat numerous challenges like channel loss, inter-symbol interference and more importantly error detection and correction. It is imperative to have a mechanism in place to detect and correct errors as data is transmitted and received, while maintaining small silicon area and low power consumptio... » read more

Blog Review: Oct. 25


Mentor's Joe Hupcey III explains the benefits of prioritizing faults with formal analysis before launching detailed fault verification. Cadence's Paul McLellan listens in as AMD's Mark Papermaster discusses what's needed to keep driving Moore's Law. Synopsys' Jesse Victors takes a look at ROCA, the latest flaw affecting RSA cryptography, and argues it may be time for a new encryption sche... » read more

The Week In Review: Design


M&A Synopsys acquired Sidense, a provider of antifuse one-time programmable (OTP) non-volatile memory (NVM) for standard-logic CMOS processes. Sidense was founded in 2004 in Canada. Terms of the deal were not disclosed. ArterisIP acquired the software and intellectual property rights of iNoCs, a provider of network-on-chip IP and design tools. Founded in 2007, the Swiss company was spun... » read more

Blog Review: Oct. 18


Mentor's Nitin Bhagwath suggests some ways to deal with undesirable signal integrity effects in DDR designs. Cadence's Ken Willis argues that for multi-gigabit serial link interfaces, signal integrity analysis should start upstream of the traditional post-layout verification step. Synopsys' Ravindra Aneja contends that understanding formal core data can reduce the overall effort and short... » read more

The Week In Review: Design


Storage Western Digital uncorked disk drives based upon microwave-assisted magnetic recording technology. MAMR technology is one of two energy-assisted technologies the company has under development, the other being heat-assisted magnetic recording. Of the two, Western Digital said only MAMR has achieved the reliability required in data centers. The company noted that densities of its MAMR dev... » read more

Securing High-Value Embedded Targets


Understanding security threats and building solutions to protect against them is a relatively new concept for embedded developers. As an example, many early IoT devices were focused purely on cost. Designers spent very little time architecting robust security solutions. Today, these devices are more involved in users’ daily routines, processing sensitive data such as personal medical informat... » read more

Trimming Waste In Chips


Extra circuitry costs money, reduces performance and increases power consumption. But how much can really be trimmed? When people are asked that question they either get defensive or they see it as an opportunity to show the advantages of their architecture, design process or IP. The same holds true for IP suppliers. Others point out that the whole concept of waste is somewhat strange, becau... » read more

Noise Abatement


[getkc id="285" kc_name="Noise"] is a fact of life. Almost everything we do creates noise as a by-product and quite often what is a signal to one party is noise to another. Noise cannot be eliminated. It must be managed. But is noise becoming a larger issue in chips as the technology nodes get smaller and packaging becomes more complex? For some, the answer is a very strong yes, while for ot... » read more

Addressing Power Integrity Challenges For SoCs


Power integrity has become a crucial part of the system-on-a-chip (SoC) design flow because power-related issues can affect chip timing and even lead to complete device failure. Specifically, excessive rail voltage drop (IR-drop) and ground bounce can create timing problems and electromigration effects that impact a chip's performance and reliability. Analyzing a chip's power also poses diff... » read more

Blog Review: Oct. 11


Mentor's Matthew Balance examines the separation of concerns between test intent and test realization in the Portable Stimulus specification. Synopsys' Deepak Nagaria checks out the features that makes LPDDR4 efficient in terms of power consumption, bandwidth utilization, data integrity and performance. Cadence's Meera Collier listens in as Chris Rowen considers whether AI processing shou... » read more

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