tag: Cadence

Using Software Approaches In Hardware Verification
By Ann Mutschler - 26 Dec, 2018 - Comments: 1

Agile methodologies, created to improve quality in software code, increasingly are being applied to hardware verification. This is less of a drastic shift than it might first appear. Developing a verification testbench is largely software, and similar methodologies can be used for reducing bugs in hardware. “A testbench is nothing more than a big software project, and it makes perfect s... » read more

Fundamental Shifts In 2018
By Brian Bailey - 20 Dec, 2018 - Comments: 1

What surprised the industry in 2018?  While business has been strong, markets are changing, product categories are shifting and clouds are forming on the horizon. As 2018 comes to a close, most companies are pretty happy with the way everything turned out. Business has been booming, new product categories developing, and profits are meeting or beating market expectations. "2018 was indeed a... » read more

Verification Throughput Is Set To Increase By Leaps And Bounds In 2019
By Frank Schirrmeister - 20 Dec, 2018 - Comments: 0

In June 2015, I wrote the blog “Towards A Metric To Measure Verification Computing Efficiency” that introduced what we now refer to here at Cadence as the “productivity wheel” for verification payloads—the sequence of “build”, “allocate”, “run” and “debug” that is repeated thousands of times during a project. It was meant to set up the launch of the Palladium Z1 platfo... » read more

Debug Tops Verification Tasks
By Ann Mutschler - 20 Dec, 2018 - Comments: 0

Verification engineers are spending an increased percentage of their time in debug — 44%, according to a recent survey by the Wilson Research Group. There are a variety or reasons for this, including the fact that some SoCs are composed of hundreds of internally developed and externally purchased IP blocks and subsystems. New system architectures contribute to the mix, some of which are be... » read more

AI Market Ramps Everywhere
By Brian Bailey - 20 Dec, 2018 - Comments: 0

Artificial Intelligence (AI) has inspired the general populace, but its rapid rise over the past few years has given many people pause. From realistic concerns about robots taking over jobs to sci-fi scares about robots more intelligent than humans building ever smarter robots themselves, AI inspires plenty of angst. Within the technology industry, we have a better understanding about the pote... » read more

Enabling Embedded Vision Neural Network DSPs
By Cadence - 19 Dec, 2018 - Comments: 0

Neural networks are now being developed in a variety of technology segments in the embedded market, from mobile to surveillance to the automotive segment. The computational and power requirements to process this data is increasing, with new methods to approach deep learning challenges emerging every day. Vision processing systems must be designed holistically, for all platforms, with hardwa... » read more

Designing For Ultra-Low-Power IoT Devices
By Ann Mutschler - 19 Dec, 2018 - Comments: 1

Optimizing designs for power is becoming the top design challenge in battery-driven IoT devices, boxed in by a combination of requirements such as low cost, minimum performance and functionality, as well as the need for at least some of the circuits to be always on. Power optimization is growing even more complicated as AI inferencing moves from the data center to the edge. Even simple... » read more

Blog Review: Dec. 19
By Jesse Allen - 19 Dec, 2018 - Comments: 0

Cadence's Dave Pursley checks out the state of high-level synthesis and notes that 39% of survey respondents expect to be using it for the majority of designs within three years. In a video, Mentor's Colin Walls digs into how to measure RTOS performance with a focus on interrupt latency. Synopsys' Taylor Armerding chats with Chenxi Wang of Rain Capital to find what the security landscape will... » read more

Week In Review: Design, Low Power
By Jesse Allen - 14 Dec, 2018 - Comments: 0

The MIPI Alliance released MIPI I3C Basic v1.0, a subset of the MIPI I3C sensor interface specification that bundles 20 of the most commonly needed I3C features for developers and other standards organizations. The royalty-free specification includes backward compatibility with I2C, 12.5 MHz multi-drop bus that is over 12 times faster than I2C supports, in-band interrupts to allow slaves to not... » read more

The Cost Of Accuracy
By Brian Bailey - 13 Dec, 2018 - Comments: 0

How accurate does a system need to be, and what are you willing to pay for that accuracy? There are many sources of inaccuracy throughout the development flow of electronic systems, most of which involve complex tradeoffs. Inaccuracy leaves an impact on your design in ways you are not even aware of, hidden by best practices or guard-banding. EDA tools also inject some inaccuracy. As the i... » read more

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