tag: chip design

Accelerating Coverage Closure With AI-Based Verification Space Optimization
By Synopsys - 03 May, 2023 - Comments: 0

Coverage is at the heart of all modern semiconductor verification. There is no maxim more fundamental to this process than “if you haven’t exercised it, you haven’t verified it.” Although covering a particular aspect of a chip design does not guarantee that all bugs are found — bug effect propagation and checker quality are also key factors — it is certainly true that bugs cannot po... » read more

AI Adoption Slow For Design Tools
By Brian Bailey - 01 May, 2023 - Comments: 0

A lot of excitement, and a fair amount of hype, surrounds what artificial intelligence (AI) can do for the EDA industry. But many challenges must be overcome before AI can start designing, verifying, and implementing chips for us. Should AI replace the algorithms in use today, or does it have a different role to play? At the end of the day, AI is a technique that has strengths and weaknesses... » read more

Can AI Write RTL?
By Brian Bailey - 01 May, 2023 - Comments: 0

Just a few months ago, generative AI was just a promise about what would be possible in the future. Today, nearly everyone with an ounce of curiosity has tried ChatGPT. Most people appear to be somewhat impressed with what it can do, but at the same time see the limitations that it has. As Dean Drako, founder of several companies, told me: "Recently, I needed to write a patent. I described t... » read more

EDA Makes A Frenzied Push Into Machine Learning
By Ed Sperling - 27 Apr, 2023 - Comments: 0

Machine learning is becoming a competitive prerequisite for the EDA industry. Big chipmakers are endorsing and demanding it, and most EDA companies are deploying it for one or more steps in the design flow, with plans to add much more over time. In recent weeks, the three largest EDA vendors have made sweeping announcements about incorporating ML into their tools at their respective user eve... » read more

RISC-V Disrupting EDA
By Brian Bailey - 23 Mar, 2023 - Comments: 3

The electronic design automation (EDA) industry started in the 1980s and primarily was driven by the test and PCB industries. The test industry was focused on simulation so that test vector sets could be developed and optimized. The PCB industry needed help managing complexity as system sizes grew. That complexity soon was eclipsed by IC complexity and the costs associated with making a mist... » read more

Week In Review: Design, Low Power
By Marie C. Baca - 28 Oct, 2022 - Comments: 0

Tools and IP Scandinavian researchers used a laser-powered chip to transmit about 1.84 petabytes of data over a fiber optic cable in one second. The scientists said the technology could lead to faster broadband speeds and reduce the amount of energy used to keep the internet running. Imec said the semiconductor industry is likely to see increasing separation of power delivery and signal rou... » read more

A Power-First Approach
By Brian Bailey - 27 Oct, 2022 - Comments: 6

It is becoming evidently clear that heat will be the limiter for the future of semiconductors. Already, large percentages of a chip are dark at any time, because if everything operated at the same time the amount of heat generated would exceed the ability of the chip and package to dissipate that energy. If we now start to contemplate stacking dies, where the ability to extract heat remains con... » read more

EDA, IP Revenue Way Up
By Ed Sperling - 17 Oct, 2022 - Comments: 0

EDA and semiconductor IP sales grew 17.5% to $3.75 billion in Q2, the highest growth in more than a decade, fueled by more complex designs and the need for advanced design and verification tools. Demand for nearly every segment tracked in SEMI's Electronic Design Market Data (EDMD) report was up, including services, which grew 23.2% in Q2 — the most recent statistics available in. That cou... » read more

What Is The Definition Of Design For Context?
By Don Dingee - 17 Oct, 2022 - Comments: 0

EDA industry pundits and bloggers are latching onto a new term: design for context. So far, it has eluded a crisp yet complete definition. It's one of those ideas that if you ask ten people about it, you get ten different answers – some better than others. Ed Sperling wryly observed this in his recent panel discussions about the topic: "Even my questions are getting longer." When Keysight lis... » read more

IC Architectures Shift As OEMs Narrow Their Focus
By Ed Sperling - 03 Oct, 2022 - Comments: 0

Diminishing returns from process scaling, coupled with pervasive connectedness and an exponential increase in data, are driving broad changes in how chips are designed, what they're expected to do, and how quickly they're supposed to do it. In the past, tradeoffs between performance, power, and cost were defined mostly by large OEMs within the confines of an industry-wide scaling roadmap. Ch... » read more

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