tag: imec

Manufacturing Bits: Dec. 14
By Mark LaPedus - 14 Dec, 2021 - Comments: 0

3D-SOCs At this week’s IEEE International Electron Devices Meeting (IEDM), a plethora of companies, R&D organizations and universities presented papers on the latest and greatest technologies. One of the themes at IEDM is advanced packaging, a technology enables an IC vendor to boost the performance of a chip. Advanced forms of packaging also enables new 3D-like chip architectures. Fo... » read more

Power/Performance Bits: Nov. 16
By Jesse Allen - 16 Nov, 2021 - Comments: 0

Light-emitting memory Researchers from Kyushu University and National Taiwan Normal University propose a 'light-emitting memory' based on a perovskite that can simultaneously store and visually transmit data. The team used the idea in conjunction with resistive RAM (RRAM), in which states of high and low resistance represent ones and zeros. "The electrical measurements needed to check the r... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 29 Oct, 2021 - Comments: 0

Chipmakers After years in the works, GlobalFoundries is finally a public company. But on its first day of trading on Thursday (Oct. 28), shares of the foundry vendor slipped a bit. GF finished its first day of trading at $46.40. This compares to the $47 per share it priced in the initial public offering (IPO), according a report to Reuters. The chipmaker has a market capitalization of about $2... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Oct, 2021 - Comments: 0

Arteris IP uncorked its initial public offering this week, a rare occurrence for a semiconductor IP vendor over the past couple decades. The stock began trading on the Nasdaq Global Market on Wednesday under the ticker symbol AIP, gaining more than 40% on its first day. Tools Codasip updated its Studio processor design toolset. Version 9.1 includes an expanded bus support with full AXI for ... » read more

Manufacturing Bits: Oct. 26
By Mark LaPedus - 26 Oct, 2021 - Comments: 0

GaN finFETs, scaling GaN At the upcoming IEEE International Electron Devices Meeting (IEDM) in San Francisco, a slew of entities will present papers on the latest technologies in R&D. The event, to be held Dec. 11–15, involve papers on advanced packaging, CMOS image sensors, interconnects, transistors, power devices and other technologies. At IEDM, Intel will present a paper on a GaN-... » read more

Why Mask Blanks Are Critical
By Mark LaPedus - 21 Oct, 2021 - Comments: 1

Geoff Akiki, president of Hoya LSI at the Hoya Group, sat down with Semiconductor Engineering to talk about optical and extreme ultraviolet (EUV) lithography as well as mask blanks. What follows are excerpts of that discussion. SE: Mask blanks are components that serve as the base or the substrate for a photomask. Why are they critical? Akiki: If you look at Hoya, we've been positioned as... » read more

Gearing Up For High-NA EUV
By Mark LaPedus - 21 Oct, 2021 - Comments: 2

The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

Progress On General-Purpose Quantum Computers
By Katherine Derbyshire - 21 Oct, 2021 - Comments: 0

The race is on to scale up quantum computing, transforming it from an esoteric research tool into a commercially viable, general-purpose machine. Special-purpose quantum computers have been available for several years now. Systems like D-Wave’s Advantage focus on specific classes of problems that are amenable to modeling as quantum systems. Still, the ultimate goal of having a general purp... » read more

What’s Next For Transistors And Chiplets
By Mark LaPedus - 21 Oct, 2021 - Comments: 5

Sri Samavedam, senior vice president of CMOS Technologies at Imec, sat down with Semiconductor Engineering to talk about finFET scaling, gate-all-around transistors, interconnects, packaging, chiplets and 3D SoCs. What follows are excerpts of that discussion. SE: The semiconductor technology roadmap is moving in several different directions. We have traditional logic scaling, but packaging i... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 15 Oct, 2021 - Comments: 0

Chipmakers TSMC posted its results for the quarter and confirmed its long-awaited plans to build a fab in Japan. It’s not a leading-edge fab, but rather a plant for 28nm/22nm processes. “The company confirmed plans to build a new fab in Japan for 22nm + 28nm,” said Aaron Rakers, an analyst at Wells Fargo, in a research note. “An average 22/28nm fab costs ~$4-5B range per 45k wspm. Fab ... » read more

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