2D materials for future heterogeneous electronics


Abstract "Graphene and two-dimensional materials (2DM) remain an active field of research in science and engineering over 15 years after the first reports of 2DM. The vast amount of available data and the high performance of device demonstrators leave little doubt about the potential of 2DM for applications in electronics, photonics and sensing. So where are the integrated chips and enabled ... » read more

Survey: 2022 Deep Learning Applications


The 2022 member list of deep learning projects and products that eBeam members are working on in photomask to wafer semiconductor manufacturing. Participating companies include Advantest, ASML, Canon, CEA-LETI, D2S, Fraunhofer IPMS, Hitachi High-Tech Corporation, imec, NuFlare Technology, Siemens Industries Software, Inc.; Siemens EDA, STMicroelectronics, and TASMIT. Click here to see the su... » read more

2D Semiconductors Make Progress, But Slowly


Researchers are looking at a variety of new materials at future nodes, but progress remains slow. In recent years, 2D semiconductors have emerged as a leading potential solution to the problem of channel control in highly scaled transistors. As devices shrink, the channel thickness should shrink proportionally. Otherwise, the gate capacitance won’t be large enough to control the flow of cu... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs UMC plans to build a new fab next to its existing 300mm fab in Singapore. The new fab, called Fab12i P3, will manufacture wafers based on UMC’s 22nm/28nm processes. The planned investment for this project will be $5 billion. The first phase of this greenfield fab will have a monthly capacity of 30,000 wafers with production expected to commence in late 2024. To account fo... » read more

Transistors Reach Tipping Point At 3nm


The semiconductor industry is making its first major change in a new transistor type in more than a decade, moving toward a next-generation structure called gate-all-around (GAA) FETs. Although GAA transistors have yet to ship, many industry experts are wondering how long this technology will deliver — and what new architecture will take over from there. Barring major delays, today’s GAA... » read more

Next-Gen 3D Chip/Packaging Race Begins


The first wave of chips is hitting the market using a technology called hybrid bonding, setting the stage for a new and competitive era of 3D-based chip products and advanced packages. AMD is the first vendor to unveil chips using copper hybrid bonding, an advanced die-stacking technology that enables next-generation 3D-like devices and packages. Hybrid bonding stacks and connects chips usin... » read more

Photomask Challenges At 3nm And Beyond


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

An Event-Driven and Fully Synthesizable Architecture for Spiking Neural Networks


Abstract:  "The development of brain-inspired neuromorphic computing architectures as a paradigm for Artificial Intelligence (AI) at the edge is a candidate solution that can meet strict energy and cost reduction constraints in the Internet of Things (IoT) application areas. Toward this goal, we present μBrain: the first digital yet fully event-driven without clock architecture, with co-lo... » read more

GaN Application Base Widens, Adoption Grows


Gallium nitride (GaN) is beginning to show up across a broad range of power semiconductor applications due to its wide bandgap, enabling fast-charging, very high speeds, and much smaller form factors than silicon-based chips. Unlike silicon carbide (SiC), another wide-bandgap technology, GaN is a lateral rather than a vertical device. GaN tops out at about 900 volts, which limits its use in ... » read more

Business, Technology Challenges Increase For Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

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