tag: imec

Week In Review: Manufacturing, Test
By Ed Sperling - 29 Apr, 2022 - Comments: 0

It's earnings season, and despite widespread reports of capacity issues and shortages, the chip industry turned in relatively solid results across the board. Intel exceeded January guidance for Q1, reporting first-quarter GAAP revenue of $18.4 billion, a 7% year-over-year decrease, and a 1% decrease year-over-year on non-GAAP basis. Record revenue was achieved in the Network and Edge Group, ... » read more

BEOL Integration For The 1.5nm Node And Beyond
By Assawer Soussou - 25 Apr, 2022 - Comments: 0

As we approach the 1.5nm node and beyond, new BEOL device integration challenges will be presented. These challenges include the need for smaller metal pitches, along with support for new process flows. Process modifications to improve RC performance, reduce edge placement error, and enable challenging manufacturing processes will all be required. To address these challenges, we investigated th... » read more

Week In Review: Manufacturing, Test
By Linda Christensen - 15 Apr, 2022 - Comments: 0

Photonic Chips Go Big In Europe PhotonDelta, a collaborative end-to-end supply chain for the application of photonics chips, secured €1.1 billion in conditional funding for a six-year initiative. Investments from the Netherlands government and other organizations “will be used to build 200 startups, scale up production, create new applications for photonic chips, and develop infrastructure... » read more

Strategies For Faster Yield Ramps On 5nm Chips
By Laura Peters - 12 Apr, 2022 - Comments: 0

Leading chipmakers TSMC and Samsung are producing 5nm devices in high volume production and TSMC is forging ahead with plans for first 3nm silicon by year end. But to meet such aggressive targets, engineers must identify defects and ramp yield faster than before. Getting a handle on EUV stochastic defects — non-repeating patterning defects such as microbridges, broken lines, or missing con... » read more

Extracting Intrinsic Mechanical Properties Of Thin Low-Dielectric Constant Materials With iTF Analysis
By Bruker - 12 Apr, 2022 - Comments: 0

This white paper focuses on the optimization and use of Bruker’s iTF software package for the extraction of intrinsic (substrate independent) mechanical properties, particularly for thin, low-k materials. These considerations are split into two main parts: Measurement procedure (Section II) and iTF execution (Section III). The former outlines important aspects of acquiring proper experimental... » read more

Week In Review: Manufacturing, Test
By Ed Sperling - 25 Mar, 2022 - Comments: 0

Worldwide fab equipment spending for front-end manufacturing is expected to hit $107 billion this year, an 18% year-over-year increase, according to SEMI’s latest World Fab Forecast report. “Crossing the $100 billion mark in spending on global fab equipment for the first time is a historic milestone for the semiconductor industry,” said Ajit Manocha, president and CEO of SEMI. Investme... » read more

Technical Paper Round-Up: March 22
By Linda Christensen - 22 Mar, 2022 - Comments: 0

New memories, materials, and transistor types, and processes for making those devices, highlighted the past week's technical papers. That includes everything from vertical MoS2 to programmable black phosphorus image sensors and photonic lift-off processes for flexible thin-film materials. Papers continue to flow from all parts of the supply chain, with some new studies out of Pakistan, Seoul... » read more

Highly Selective Etch Rolls Out For Next-Gen Chips
By Mark LaPedus - 21 Mar, 2022 - Comments: 0

Several etch vendors are starting to ship next-generation selective etch tools, paving the way for new memory and logic devices. Applied Materials was the first vendor to ship a next-gen selective etch system, sometimes called highly-selective etch, in 2016. Now, Lam Research, TEL, and others are shipping tools with highly-selective etch capabilities, in preparation for futuristic devices su... » read more

Extending Copper Interconnects To 2nm
By Laura Peters - 17 Mar, 2022 - Comments: 0

Transistor scaling is reaching a tipping point at 3nm, where nanosheet FETs will likely replace finFETs to meet performance, power, area, and cost (PPAC) goals. A significant architectural change is similarly being evaluated for copper interconnects at 2nm, a move that would reconfigure the way power is delivered to transistors. This approach relies on so-called buried power rails (BPRs) and... » read more

GaN ICs Wanted for Power, EV Markets
By Katherine Derbyshire - 17 Mar, 2022 - Comments: 0

Circuits built with discrete GaN components may get the job done, but fully integrated GaN circuits remain the ultimate goal because they would offer many of the same advantages as integrated silicon circuits. These benefits include lower cost as the circuit footprint is scaled, and reduced parasitic resistance and capacitance with shorter interconnect runs. In addition, improved device perf... » read more

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