Blog Review: Jan. 10


Rambus' Aharon Etengoff explains the Meltdown and Spectre CPU vulnerabilities and why they could negatively affect the semiconductor industry for decades. Cadence's Paul McLellan has an explainer on Meltdown and how it's an unintended consequence of a processor behaving as intended. Mentor's Ruben Ghulghazaryan and Jeff Wilson investigate using machine learning to predict post-deposition ... » read more

Packaging Challenges For 2018


The IC packaging market is projected to see steady growth this year, amid ongoing changes in the landscape. The outsourced semiconductor assembly and test ([getkc id="83" kc_name="OSAT"]) industry, which provides third-party packaging and test services, has been consolidating for some time. So while sales rising, the number of companies is falling. In late 2017, for example, [getentity id="2... » read more

Reshaping Automotive Design


The entire automotive ecosystem is being reshaped by vehicle electrification, assisted and autonomous driving, and the connectivity needed to make it all work. So far, it's not clear just how smoothly this will all come together. In this redefined world, electronics and software will provide differentiation rather than mechanical engineering and possibly even brand name, creating change on a... » read more

Blog Review: Jan. 3


Ansys' Steve Pytel argues that increased signaling speeds and frequencies have led to signal integrity issues that circuit simulation alone cannot handle. Cadence's Paul McLellan dives into the details of Intel's 10nm process, including three layers of self-aligned quadruple patterning, contact-over-active-gate, and cobalt for contact fill. Mentor's Ron Press and Vidya Neerkundar argue th... » read more

A New Memory Contender?


Momentum is building for a new class of ferroelectric memories that could alter the next-generation memory landscape. Generally, ferroelectrics are associated with a memory type called ferroelectric RAMs (FRAMs). Rolled out by several vendors in the late 1990s, FRAMs are low-power, nonvolatile devices, but they are also limited to niche applications and unable to scale beyond 130nm. While... » read more

What the Experts Think


Coventor recently sponsored an expert panel discussion at IEDM 2017 to discuss how we might advance the semiconductor industry into the next generation of technology. The panel discussed alternative methods to solve fundamental problems of technology scaling, using advances in semiconductor architectures, patterning, metrology, advanced process control, variation reduction, co-optimization and ... » read more

All About Interconnects


It's well known that advanced chips contain billions of transistors – this is an incredible, mind-blowing fact to be sure – but did you know that large-scale integrated chips (about the size of a fingernail) can contain ~30 miles of interconnect “wires” in stacked levels? These wires function like highways or pipelines to transport electrons, connect transistors and other components to ... » read more

The Next 5 Years Of Chip Technology


Semiconductor Engineering sat down to discuss the future of scaling, the impact of variation, and the introduction of new materials and technologies, with Rick Gottscho, CTO of [getentity id="22820" comment="Lam Research"]; Mark Dougherty, vice president of advanced module engineering at [getentity id="22819" comment="GlobalFoundries"]; David Shortt, technical fellow at [getentity id="22876" co... » read more

Chipmakers Look To New Materials


Graphene, the wonder material rediscovered in 2004, and a host of other two-dimensional materials are gaining ground in manufacturing semiconductors as silicon’s usefulness begins to fade. And while there are a number of compounds in use already, such as gallium arsenide, gallium nitride, and silicon carbide, those materials generally are being confined to specific niche applications. Tran... » read more

Blog Review: Dec. 13


Mentor's Sherif Hany notes that pattern matching isn't just for litho hotspots anymore, and is increasingly being used in a wide range of early design phase checks, DRC flows, layout retargeting and fixing and DFM checks. Synopsys' Eric Huang explains why USB cables have gotten so short, even though no length is mentioned in the specification. Cadence's Paul McLellan listens in as Jeremy ... » read more

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