tag: Lam Research

Photoresist Shape In 3D
By Mustafa Akbulut - 20 Apr, 2017 - Comments: 0

Things were easy for integrators when the pattern they had on the mask ended up being the pattern they wanted on the chip. Multi-patterning schemes such as Self-Aligned Double Patterning (SADP) and Self-Aligned Quadruple Patterning (SAQP) have changed that dramatically. Now, what you have on the mask determines only a part of what you will get at the end. You will only obtain your final product... » read more

Understanding How Small Variations In Photoresist Shape Significantly Impact Multi-Patterning Yield
By Coventor - 20 Apr, 2017 - Comments: 0

Multi-patterning schemes such as Self-Aligned Double Patterning (SADP) and Self-Aligned Quadruple Patterning (SAQP) have been used to successfully increase semiconductor device density, circumventing prior physical limits in pattern density. However, the number of processing steps needed in these patterning schemes can make it difficult to directly translate a lithographic mask pattern to a fin... » read more

Inside Next-Gen Transistors
By Mark LaPedus - 20 Apr, 2017 - Comments: 0

David Fried, chief technology officer at [getentity id="22210" e_name="Coventor"], sat down with Semiconductor Engineering to discuss the IC industry, China, scaling, transistors and process technology. What follows are excerpts of that conversation. SE: In a recent roundtable discussion you talked about some of the big challenges facing the IC industry. One of your big concerns involves th... » read more

Moore’s Law: A Status Report
By Ed Sperling - 20 Apr, 2017 - Comments: 3

Moore's Law has been synonymous with "smaller, faster, cheaper" for the past 52 years, but increasingly it is viewed as just one of a number of options—some competing, some complementary—as the chip industry begins zeroing in on specific market needs. This does not make [getkc id="74" comment="Moore's Law"] any less relevant. The number of companies racing from 16/14nm to 7nm is higher t... » read more

Blog Review: April 19
By Jesse Allen - 19 Apr, 2017 - Comments: 0

Mentor's Tom Fitzpatrick explains what the Portable Stimulus standard will do, what it won't, and why the choice of input language defined by the standard matters. Cadence's Paul McLellan listens in as IRDS chairman Paolo Gargini explains how long it takes technology breakthroughs to make out of the lab and into high-volume manufacturing. Synopsys' Robert Vamosi points to the recent sound... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 14 Apr, 2017 - Comments: 0

Fab equipment and test VLSI Research has released its top 10 semiconductor equipment supplier ranking in terms of sales in 2016. Applied Materials topped the list again, achieving a growth of 18%. ASML was second, followed by Lam Research, TEL and KLA-Tencor. Fig. 1: Ranking based on 2016 sales. Source: VLSI Research. Unic Capital Management, a Chinese-based private equity fund, announ... » read more

Electroplating IC Packages
By Mark LaPedus - 10 Apr, 2017 - Comments: 2

The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp. [getentity id="22817" e_name="Applied Materials"]  recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging. ECD—sometimes referred to as pl... » read more

Inside Lithography And Masks
By Mark LaPedus - 05 Apr, 2017 - Comments: 3

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; David Fried, chief technology officer at [getentity id="22210" e_name="Cove... » read more

Blog Review: April 5
By Jesse Allen - 05 Apr, 2017 - Comments: 0

In a video, Cadence's Megha Daga digs into the different architectural layers present in convolutional neural networks and how they contribute to object detection and classification in a real world scenario. Mentor's Mike Santarini argues that as things become increasingly connected, the stakes of bad design and bad verification are higher than they've ever been. Synopsys' Robert Vamosi w... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 31 Mar, 2017 - Comments: 0

Chipmakers At an event, Intel’s Technology and Manufacturing group outlined the company's vision. As part of the event, Intel reiterated what many are saying—the current node designations are meaningless and misleading. “For example, Intel estimates that its 14nm solution that has been out in the market since 2014 should be equal to 10nm solutions released by competitors in the near futu... » read more

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