tag: lithography

One-On-One: Dave Hemker
By Ed Sperling - 19 May, 2016 - Comments: 0

Dave Hemker, CTO at [getentity id="22820" comment="Lam Research"], sat down with Semiconductor Engineering to look at some of the key issues on the process and manufacturing side, and some of the key developments that will reshape the semiconductor industry in the future. What follows are excerpts of that conversation. SE: One of the big discussion topics these days is [getkc id="208" commen... » read more

7nm Fab Challenges
By Mark LaPedus - 21 Apr, 2016 - Comments: 3

Leading-edge foundry vendors have made the challenging transition from traditional planar processes into the finFET transistor era. The first [getkc id="185" kc_name="finFETs"] were based on the 22nm node, and now the industry is ramping up 16nm/14nm technologies. Going forward, the question is how far the finFET can be scaled. In fact, 10nm finFETs from Samsung are expected to ramp by ye... » read more

Inside Process Technology
By Mark LaPedus - 21 Apr, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss the foundry business, memory, process technology, lithography and other topics with David Fried, chief technology officer at [getentity id="22210" e_name="Coventor"], a supplier of predictive modeling tools. What follows are excerpts of that conversation. SE: Chipmakers are ramping up 16nm/14nm finFETs today, with 10nm and 7nm finFETs just around... » read more

Foundation IP For 7nm FinFETs: Design And Implementation
By Synopsys - 13 Apr, 2016 - Comments: 0

Learn about the challenges of IP design and implementation for 7nm FinFETs. Along with the performance and area benefits that the node brings, designers must understand the significant technical challenges stemming from increasing variability associated with tighter pitches and more complex lithography steps. Design for variability and reliability considerations will require comprehensive model... » read more

Where Is Next-Gen Lithography?
By Mark LaPedus - 11 Apr, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at Imec; Harry Levinson, senior fellow and senior director of technology research at GlobalFoundries; Uday Mitra, vice president and head of strategy and marketing for the Etch Business Unit and Patterning Module at Applied Materials; Naoya Haya... » read more

Using Chip Technology To Detect And Prevent Diseases
By Michael Watts - 11 Apr, 2016 - Comments: 0

The overlap between semiconductor technology and medicine is growing, creating the same kinds of economies of scale that have fueled the semiconductor industry for the past five decades. While technology has long held a place in the medical world, the idea that chips can save lives and improve health is a relatively new concept. That effort is gaining steam, too, as more capabilities are add... » read more

Where Is Next-Gen Lithography?
By Mark LaPedus - 31 Mar, 2016 - Comments: 2

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

Tech Talk: GPU-Accelerated Photomasks
By Ed Sperling - 22 Mar, 2016 - Comments: 0

Noriaki Nakayamada, group manager for the data control engineering group in NuFlare's Mask Lithography engineering Department, talks about what's changing on the mask side, where the trouble spots are, and how to deal with them at advanced process nodes. [youtube vid=f8PixJMadXw] » read more

Ready For Nanoimprint?
By Michael Watts - 17 Mar, 2016 - Comments: 0

Nanoimprint has been discussed, debated, and hyped since the term was first introduced in 1996. Now, a full 20 years later, it is being taken much more seriously in light of increasing photomask costs and delays in bringing alternatives to market. Nanoimprint lithography is something like a room-temperature UV cure embossing process. The structures are patterned onto a template or mold using... » read more

Where Is Next-Gen Lithography?
By Mark LaPedus - 17 Mar, 2016 - Comments: 4

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

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