Chip Industry Week in Review

By The SE Staff - 12 Sep, 2025 - Comments: 0

The U.S. is considering annual approvals for Samsung and SK hynix to export chipmaking tools and materials to their factories in China, replacing perpetual waivers granted under the validated end user system, reports Bloomberg. The proposal, presented by the U.S. Commerce Department to South Korean officials, would require the companies to reapply each year for specific quantities of restricted... » read more

From Discovery To High-Speed Delivery: A Unified Verification Approach For UCIe 3.0 Features And Manageability

By Ujjwal Negi - 11 Sep, 2025 - Comments: 0

By Ujjwal Negi and Prashant Dixit The Universal Chiplet Interconnect Express (UCIe) standard is redefining multi-die integration, enabling high-performance, scalable connections between heterogeneous chiplets. UCIe 2.0 introduced a dedicated manageability layer — a control plane for configuring, monitoring, and coordinating chiplet management elements independently from mainband and sideba... » read more

The Demise Of Static Timing Verification?

By Brian Bailey - 11 Sep, 2025 - Comments: 0

The chip industry traditionally has relied on margins to help them mitigate timing problems, but an increasing array of factors are now influencing timing. Can static timing analysis evolve to address these problems? Static timing verification (STA) was a cornerstone technology for the acceptance of the register transfer level (RTL) abstraction. It showed that functionality would not be impa... » read more

Verifying The Evolving UCIe Landscape

By Siemens EDA - 10 Sep, 2025 - Comments: 0

This paper details a verification strategy for UCIe 3.0 designs, integrating both legacy manageability architecture and emerging UCIe 3.0 features into a reusable, scalable framework. Built on a layered UVM architecture, Questa One Avery VIP for UCIe enables flexible modeling of complex domains through configurable APIs and supports automated discovery and routing table setup for both direct an... » read more

Blog Review: Sept. 10

By Jesse Allen - 10 Sep, 2025 - Comments: 0

Cadence's Satish Kumar C explains Port-Based Routing, a feature in in CXL 3.0 and 3.1 that changes how CXL switches operate within a CXL fabric to enable the creation of much larger, more flexible, and more efficient topologies. Siemens' Bill Hargin demystifies copper foil thickness and weight measurements and why being precise has an impact on signal integrity and crosstalk simulations.... » read more

Making The Most of Test Resources

By Laura Peters - 09 Sep, 2025 - Comments: 0

Semiconductor testing is undergoing multiple paradigm changes at once with the common goals of producing more known good die per month with low test cost. Achieving these goals requires a delicate balance between yield, quality, and test times. There are multiple ways to go about making better use of existing resources, many of which involve an increasing use of design for test (DFT) methods... » read more

Infusing Trust Into The Supply Chain

By Anne Meixner - 09 Sep, 2025 - Comments: 0

An expanding supply chain of dies feeding multi-die products is prompting chipmakers to reassess and expand on ways to instill trust from end to end. This reaches deeper than just connecting disparate data. It requires integrating complex systems across vendors and protecting vendor data while instilling confidence in their customers and partners. Yet despite the time and effort that has bee... » read more

Chip Industry Week in Review

By The SE Staff - 05 Sep, 2025 - Comments: 0

Cadence plans to buy Hexagon AB's design and engineering business to accelerate expansion in physical AI and system design and analysis. Cadence will pay ~US$3.1 billion in cash and issue stock, with the deal expected to close in early 2026. PWC issued a 104-page in-depth analysis of semiconductor technology and markets, highlighting a broad swath of changes: $1T in annual revenue by 2030, ... » read more

Navigating Reliability Potholes: Early 3D Stress Analysis For Automotive ICs

By Shetha Nolke - 04 Sep, 2025 - Comments: 0

The rise of 3D integrated circuits (ICs) and heterogeneous packaging is reshaping how automotive ICs fulfill demanding analog and sensor requirements. Whether for radar, lidar, sensor fusion or domain controllers, advanced packaging enables new levels of integration—and performance—in automotive electronics. Yet, as these architectures grow more complex, they also introduce new forms of mec... » read more

6G Line-Of-Sight Repeaters, Dots, And Reflections

By Liz Allan - 04 Sep, 2025 - Comments: 0

6G will open the door to ultra-reliable, low-latency communications, extended broadband, and machine communications, but its rapid signal attenuation places some sharp limits on where and how it can be used, and requires some expensive options to overcome those limitations. Applications include lifelike virtual reality for home and work use, highly interactive smart homes and cities, and aut... » read more

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Chip Industry Week in Review

From Discovery To High-Speed Delivery: A Unified Verification Approach For UCIe 3.0 Features And Manageability

The Demise Of Static Timing Verification?

Verifying The Evolving UCIe Landscape

Blog Review: Sept. 10

Making The Most of Test Resources

Infusing Trust Into The Supply Chain

Chip Industry Week in Review

Navigating Reliability Potholes: Early 3D Stress Analysis For Automotive ICs

6G Line-Of-Sight Repeaters, Dots, And Reflections

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