Baby, It’s Hot Outside!


Electronics manufacturing production sites are ideal places to be during the summer because they maintain controlled temperatures. It’s well known that 23°C (74°F) is the ideal temperature inside electronics manufacturing areas. However, when the outside temperature reaches 40°C (104°F), the air conditioning system may struggle to maintain this lower value indoors. Many companies estab... » read more

Multi-Modal AI In EDA Development Flows


RTL coding is a critical step in the development of semiconductors, but many would argue it is not the most difficult. Things become a lot more complex as you get closer to implementation, and as the system context becomes larger than can be comprehended by text alone. In both cases, layout, timing, power, and many other factors come into play, but none is as easily represented by text, and the... » read more

How AI Will Impact Chip Design And Designers


Experts at the Table: Semiconductor Engineering sat down to discuss the role and impact of AI in chip design with Chuck Alpert, Cadence Fellow; Sathish Balasubramanian, head of product marketing and senior director for custom IC at Siemens EDA; Anand Thiruvengadam, senior director and head of AI product management at Synopsys; Sailesh Kumar, CEO of Baya Systems; Mehir Arora, head of engineering... » read more

Blog Review: July 30


Siemens' John McMillan compares 2.5D and 3D-IC technologies and why choosing between them depends on the specific requirements of a product, such as power consumption, thermal constraints, form factor limitations, data bandwidth, and performance-per-watt targets. Cadence's Yeshavanth BN checks out changes in MIPI MPHY 6.0 that increase the data rate and improve the performance of next-genera... » read more

Changes In Scan Test Data


Bigger designs with hundred of cores are creating an explosion in the volume of scan test data, significantly bumping up the amount of time spent on test. That raises the cost of test, forcing chipmakers to trade off higher costs with reliability. The solution is to raise the level of abstraction for scan tests, using a bus and packetized data that can run at much higher frequencies than is pos... » read more

Chip Industry Week in Review


Intel reported flat year-over year revenue for Q2, exceeding Wall Street's pessimistic expectations. In a message to employees, CEO Lip-Bu Tan said the company will: Cut about 15% of its staff, ending the year with about 75,000 employees, down from a high of nearly 132,000 in 2022; Scrap projects in Poland and Germany, consolidate other sites in central America and Southeast Asia, and s... » read more

CMOS 2.0: Layered Logic For The Post-Nanosheet Era


The semiconductor industry has relied on a simple equation for more than five decades — shrink the transistor, pack more onto every wafer, and watch performance soar as costs plummet. While each new node delivered predictable gains in speed, power efficiency, and density, that formula is rapidly running out of steam. As transistors approach single-digit nanometer processes, manufacturing c... » read more

Machine Learning Tools Help Bridge Design-To-Manufacturing Gap


More aggressive feature scaling and increasingly complex transistor structures are driving a steady increase in process complexity, increasing the risk that a specified pattern may not be manufacturable with an acceptable yield. A single layer now requires more process steps, and each of those entails more tunable parameters than ever before. To help manage design risk, foundries provide det... » read more

Blog Review: July 23


Synopsys' Vincent van der Leest and Mike Borza argue that hardware security is critical for providing the foundational trust, physical protection, and performance enhancements necessary to support software security and prevent leaks of sensitive data and cryptographic keys. Siemens' Shetha Nolke explains why stress matters so much in 3D-ICs and why evaluating it isn't as straightforward as i... » read more

Questa One Avery VIP: Accelerated Confidence In Complex Protocol Verification


In today’s rapidly advancing digital landscape, the role of functional verification has never been more critical. As systems become increasingly complex, ensuring their reliability and performance poses significant challenges for both design and verification engineers. The stakes are high; verification failures can lead to costly recalls, safety risks, and damage to brand reputation. The late... » read more

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